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IDT74FCT163373A Dataheets PDF



Part Number IDT74FCT163373A
Manufacturers Integrated Device Technology
Logo Integrated Device Technology
Description 3.3V CMOS 16-BIT TRANSPARENT LATCH
Datasheet IDT74FCT163373A DatasheetIDT74FCT163373A Datasheet (PDF)

3.3V CMOS 16-BIT TRANSPARENT LATCH Integrated Device Technology, Inc. IDT74FCT163373/A/C FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP and 15.7 mil pitch TVSOP • Extended commercial range of -40°C to +85°C • VCC = 3.3V ±0.3V, Normal Range or VCC = 2.7 to 3.6V, Extended Range • CMOS power levels (0.4µW typ. static) •.

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3.3V CMOS 16-BIT TRANSPARENT LATCH Integrated Device Technology, Inc. IDT74FCT163373/A/C FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP and 15.7 mil pitch TVSOP • Extended commercial range of -40°C to +85°C • VCC = 3.3V ±0.3V, Normal Range or VCC = 2.7 to 3.6V, Extended Range • CMOS power levels (0.4µW typ. static) • Rail-to-Rail output swing for increased noise margin • Low Ground Bounce (0.3V typ.) • Inputs (except I/O) can be driven by 3.3V or 5V components DESCRIPTION: The FCT163373/A/C 16-bit transparent D-type latches are built using advanced dual metal CMOS technology. These high-speed, low-power latches are ideal for temporary storage of data. They can be used for implementing memory address latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls are organized to operate each device as two 8-bit latches or one 16-bit latch. Flowthrough organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The inputs of FCT163373/A/C can be driven from either 3.3V or 5V devices. This feature allows the use of these transparent latches as translators in a mixed 3.3V/5V supply system. With xLE inputs HIGH, the FCT163373/A/C can be used as buffers to connect 5V components to a 3.3V bus. FUNCTIONAL BLOCK DIAGRAM 1OE 2OE 1LE 1D1 2LE D 1O1 2D1 D 2O1 C C TO 7 OTHER CHANNELS 2601 drw 01 TO 7 OTHER CHANNELS 2601 drw 02 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE ©1996 Integrated Device Technology, Inc. AUGUST 1996 8.4 DSC-2601/6 1 IDT74FCT163373/A/C 3.3V 16-BIT TRANSPARENT LATCH COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS PIN DESCRIPTION Pin Names xDx Description Data Inputs Latch Enable Input (Active HIGH) Output Enable Input (Active LOW) 3-State Outputs 2601 tbl 01 1OE 1 O1 1 O2 1 2 3 4 5 6 7 8 9 10 11 12 SO48-1 SO48-2 13 SO48-3 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1 LE 1 D1 1 D2 xLE xOE xOx GND 1 O3 1 O4 GND 1 D3 1 D4 ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM(2) VTERM(3) VTERM(4) TSTG I OUT Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max. –0.5 to +4.6 –0.5 to +7.0 –0.5 to VCC + 0.5 –65 to +150 –60 to +60 Unit V V V VCC 1 O5 1 O6 VCC 1 D5 1 D6 GND 1 O7 1 O8 2 O1 2 O2 GND 1 D7 1 D8 2 D1 2 D2 °C mA GND 2 O3 2 O4 GND 2 D3 2 D4 2601 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specificati.


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