DatasheetsPDF.com

ISP1181 Dataheets PDF



Part Number ISP1181
Manufacturers NXP
Logo NXP
Description Full-speed Universal Serial Bus interface device
Datasheet ISP1181 DatasheetISP1181 Datasheet (PDF)

ISP1181 Full-speed Universal Serial Bus interface device Rev. 01 — 13 March 2000 Objective specification 1. General description The ISP1181 is a Universal Serial Bus (USB) interface device which complies with Universal Serial Bus Specification Rev. 1.1. It provides full-speed USB communication capacity to microcontroller or microprocessor-based systems. The ISP1181 communicates with the system’s microcontroller or microprocessor through a high-speed general-purpose parallel interface. The fully a.

  ISP1181   ISP1181


Document
ISP1181 Full-speed Universal Serial Bus interface device Rev. 01 — 13 March 2000 Objective specification 1. General description The ISP1181 is a Universal Serial Bus (USB) interface device which complies with Universal Serial Bus Specification Rev. 1.1. It provides full-speed USB communication capacity to microcontroller or microprocessor-based systems. The ISP1181 communicates with the system’s microcontroller or microprocessor through a high-speed general-purpose parallel interface. The fully autonomous Direct Memory Access (DMA) operation - auto download, auto repeat, auto execution - removes the need for the device to re-enable or re-initialize the DMA operation every time. The modular approach to implementing a USB interface device allows the designer to select the optimum system microcontroller from the wide variety available. The ability to re-use existing architecture and firmware investments shortens development time, eliminates risks and reduces costs. The result is fast and efficient development of the most cost-effective USB peripheral solution. The ISP1181 is ideally suited for application in many personal computer peripherals, such as printers, scanners, external mass storage (zip drive) devices and digital still cameras. It offers an immediate cost reduction for applications that currently use SCSI implementations. c c 2. Features s Complies with Universal Serial Bus Specification Rev. 1.1 and most Device Class specifications s High performance USB interface device with integrated Serial Interface Engine (SIE), FIFO memory, transceiver and 3.3 V voltage regulator s Interrupt endpoint can be configured in ‘rate feedback’ mode s High speed (11.1 Mbyte/s or 90 ns read/write cycle) parallel interface s Fully autonomous and multi-configuration DMA operation s Up to 14 programmable USB endpoints with 2 fixed control IN/OUT endpoints s Integrated physical 2462 bytes of multi-configuration FIFO memory s Endpoints with double buffering to increase throughput and ease real-time data transfer s Seamless interface with most microcontrollers/microprocessors s Bus-powered capability with low power consumption and low ‘suspend’ current s 6 MHz crystal oscillator with integrated PLL for low EMI Philips Semiconductors ISP1181 Full-speed USB interface s s s s s s s s s s s Controllable LazyClock (24 kHz) output during ‘suspend’ Software controlled connection to the USB bus (SoftConnect™) Good USB connection indicator that blinks with traffic (GoodLink™) Clock output with programmable frequency (up to 48 MHz) Complies with the ACPI™, OnNow™ and USB power management requirements Internal power-on and low-voltage reset circuit, with possibility of a software reset Operation over the extended USB bus voltage range (4.0 to 5.5 V) with 5 V tolerant I/O pads Operating temperature range −40 to +85 °C 8 kV in-circuit ESD protection for lower cost of external components Full-scan design with high fault coverage Available in a TSSOP48 package. 3. Applications s Personal digital assistant (PDA) s Digital camera s Communication device, e.g. x router x modem s Printer s Scanner. 4. Ordering information Table 1: Ordering information Package Name ISP1181DGG TSSOP48 Description Plastic thin shrink small outline package; 48 leads; body width 6.1 mm Version SOT362-1 Type number 9397 750 06896 © Philips Electronics N.V. 2000. All rights reserved. Objective specification Rev. 01 — 13 March 2000 2 of 69 9397 750 06896 ndbook, full pagewidth Objective specification 6 MHz SDWR, SDRD, CLKOUT DREQ 4 45 11 17 18 16 38, 35 to 27, 24 to 19 16 BUS INTERFACE 43 to 39 5 48 MHz PROGR. DIVIDER DMA HANDLER 13, 14, 10, 12 to/from microcontroller BUS_CONF0 BUS_CONF1 READY AD, DATA1 to DATA9, DATA10 to DATA15 CS, ALE, WR, RD, A0 15 XTAL1 48 PLL OSCILLATOR BIT CLOCK RECOVERY SoftConnect PHILIPS SIE MEMORY MANAGEMENT UNIT MICRO CONTROLLER HANDLER 47 XTAL2 EOT, DACK GL to LED 7 HUB GoodLink sense input 4 6 internal reset INTEGRATED RAM ENDPOINT HANDLER INT 3.3 V 3.3 V INTERNAL SUPPLY I/O PIN SUPPLY to/from USB 5. Block diagram Philips Semiconductors D+ D − VBUS 5 3.3 V 1.5 kΩ ANALOG Tx/Rx Rev. 01 — 13 March 2000 ISP1181 2 3 9 3 Vreg(3.3) SUSPEND WAKEUP GND VCC(3.3) Vref(5.0) 8 25, 36, 46 37 26 RESET 44 POWER-ON RESET VCC(5.0) 1 VOLTAGE REGULATOR MGS767 REGGND Full-speed USB interface © Philips Electronics N.V. 2000. All rights reserved. ISP1181 3 of 69 Fig 1. Block diagram. Philips Semiconductors ISP1181 Full-speed USB interface 6. Pinning information 6.1 Pinning handbook, halfpage VCC(5.0) 1 REGGND 2 Vreg(3.3) 3 D− 4 D+ 5 VBUS 6 GL 7 WAKEUP 8 SUSPEND 9 EOT 10 DREQ 11 DACK 12 48 XTAL1 47 XTAL2 46 GND 45 CLKOUT 44 RESET 43 CS 42 ALE 41 WR 40 RD 39 A0 38 AD 37 VCC(3.3) ISP1181DGG SDWR 13 SDRD 14 INT 15 READY 16 BUS_CONF0 17 BUS_CONF1 18 DATA15 19 DATA14 20 DATA13 21 DATA12 22 DATA11 23 DATA10 24 MGL892 36 GND 35 DATA1 34 DATA2 33 DATA3 32 DATA4 31 DATA5 30 DATA6 29 DATA7 28 DATA8 27 DATA9 26 Vref(5.0) 25 GND Fig 2. Pi.


ISP1161BM ISP1181 ISP1183


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)