ispGDS18-7P

ispGDS22/18/14 in-system programmable Generic Digital Switch TM Features HIGH-SPEED SWITCH MATRIX — 7.5 ns Maximum Propagation Delay — Typical Icc = 25 mA — UltraMOS® Advanced CMOS Technology FLEXIBLE I/O MACROCELL — Any I/O Pin Can be Input, Output, or Fixed TTL High or Low — Programmable Output Polarity — Multiple Outputs Can be Driven by One Input IN-SYSTEM PROGRAMMABLE (5-VOLT ONLY) — Programming Time of Less Than One Second — 4-Wire Programming Interface — Minimum 10,000 Program/Erase Cycles E2 CELL TECHNOLOGY — Non-Volatile Reprogrammable Cells — 100% Tested/100% Yields — High Speed Electrical Erasure (<100ms) — 20 Year Data Retention APPLICATIONS INCLUDE: — Software-Driven Hardware Configuration — Multiple DIP Switch Replacement — Software Configuration of Add-In Boards — Configurable Addressing of I/O Boards — Multiple Clock Source Selection — Cross-Matrix Switch ELECTRONIC SIGNATURE FOR IDENTIFICATION Functional Block Diagram (ispGDS22) A0 A1 A2 A3 I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell Bank A A4 A5 A6 A7 A8 A9 A10 PROGRAMMABLE SWITCH MATRIX I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell I/O Cell B1 B10 B9 B8 B7 B6 B5 B4 B3 B2 Bank B I/O Cell Closed only when C0=1 and C1=0 Vcc 4:1 MUX 01 Switch Matrix 10 11 00 C2 C1 C0 Description The Lattice Semiconductor ispGDS™ family is an ideal solution for reconfiguring system signal routing or rep...