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IXDD415SI Dataheets PDF



Part Number IXDD415SI
Manufacturers IXYS Corporation
Logo IXYS Corporation
Description Dual 15 Ampere Low-Side Ultrafast MOSFET Driver
Datasheet IXDD415SI DatasheetIXDD415SI Datasheet (PDF)

IXDD415SI Dual 15 Ampere Low-Side Ultrafast MOSFET Driver Features • Built using the advantages and compatibility of CMOS and IXYS HDMOSTM processes • Latch-Up Protected • High Peak Output Current: Dual 15A Peak • Wide Operating Range: 8V to 30V • Rise And Fall Times of <3ns • Minimum Pulse Width Of 6ns • Ability to Disable Output under Faults • High Capacitive Load Drive Capability: 4nF in <5ns • Matched Rise And Fall Times • 32ns Input To Output Delay Time • Low Output Impedance • Low Supply .

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IXDD415SI Dual 15 Ampere Low-Side Ultrafast MOSFET Driver Features • Built using the advantages and compatibility of CMOS and IXYS HDMOSTM processes • Latch-Up Protected • High Peak Output Current: Dual 15A Peak • Wide Operating Range: 8V to 30V • Rise And Fall Times of <3ns • Minimum Pulse Width Of 6ns • Ability to Disable Output under Faults • High Capacitive Load Drive Capability: 4nF in <5ns • Matched Rise And Fall Times • 32ns Input To Output Delay Time • Low Output Impedance • Low Supply Current General Description The IXDD415 is a dual CMOS high speed high current gate driver specifically designed to drive MOSFETs in Class D and E HF RF applications, as well as other applications requiring ultrafast rise and fall times or short minimum pulse widths. Each output of the IXDD415 can source and sink 15A of peak current while producing voltage rise and fall times of less than 3ns. The outputs of the IXDD415 may be paralleled, producing a single output of up to 30A with comparable rise and fall times. The input of the driver is compatible with TTL or CMOS and is fully immune to latch up over the entire operating range. Designed with small internal delays, cross conduction/current shoot-through is virtually eliminated in the IXDD415. Its features and wide safety margin in operating voltage and power make the IXDD415 unmatched in performance and value. The IXDD415 has two enable inputs, ENA and ENB. These enable inputs can be used to independently disable either of the outputs, OUTA or OUTB, for added flexibility. Additionally, the IXDD415 incorporates a unique ability to disable the output under fault conditions. When a logical low is forced into the Enable inputs, both final output stage MOSFETs (NMOS and PMOS) are turned off. As a result, the output of the IXDD415 enters a tristate mode and achieves a Soft Turn-Off of the MOSFET when a short circuit is detected. This helps prevent damage that could occur to the MOSFET if it were to be switched off abruptly due to a dv/dt over-voltage transient. The IXDD415 is available in a 28 pin SO package (IXDD415SI), incorporating DEI's patented (1) RF layout techniques to minimize stray lead inductances for optimum switching performance. (1) Applications • • • • • • • • Driving RF MOSFETs Class D or E Switching Amplifier Drivers Multi MHz Switch Mode Power Supplies (SMPS) Pulse Generators Acoustic Transducer Drivers Pulsed Laser Diode Drivers DC to DC Converters Pulse Transformer Driver DEI U.S. Patent #4,891,686 Figure 1 - Functional Diagram Vcc (1, 2) Vcc (3, 4) INA (7) 200k ENA (6) OUTA (22, 23, 24) GND (25, 26) Vcc (11, 12) GND (27, 28) Vcc (13, 14) INB (8) 200k ENB (9) OUTB (19, 20, 21) GND (15, 16) GND (17, 18) Copyright © IXYS CORPORATION 2001 Patent Pending First Release IXDD415SI Absolute Maximum Ratings (Note 1) Parameter Supply Voltage All Other Pins Power Dissipation TAMBIENT ≤25 oC TCASE ≤25 oC Derating Factors (to Ambient) 28-Pin SOIC Storage Temperature Soldering Lead Temperature (10 seconds maximum) Value 30V -0.3V to VCC + 0.3V 1W 12W 0.1W/oC -65oC to 150oC 300oC Operating Ratings Parameter Maximum Junction Temperature Operating Temperature Range Value 150oC -40oC to 85oC Thermal Impedance (Junction To Case) 28 Pin SOIC (SI) (θJC) 0.75oC/W Electrical Characteristics Unless otherwise noted, TA = 25 oC, 4.5V ≤ VCC ≤ 25V . All voltage measurements with respect to GND. IXDD415 configured as described in Test Conditions. S ym b o l V IH V IL V IN I IN V OH V OL R OH R OL IP EA K ID C V EN V ENH V ENL fM AX tR tF tO N D L Y tO FF D L Y P W m in tE N O L tE N O H tD O LD tD O H D V CC IC C P a r a m e te r H ig h in p u t v o lta g e L o w in p u t v o lta g e In p u t v o lta g e ra n g e In p u t c u rre n t H ig h o u tp u t vo lta g e L o w o u tp u t v o lta g e O u tp u t re s is ta n c e @ O u tp u t H ig h O u tp u t re s is ta n c e @ O u tp u t L o w P e a k o u tp u t c u rre n t C o n tin u o u s o u tp u t c u rre n t E n a b le v o lta g e ra n g e H ig h E n in p u t v o lta g e L o w E n in p u t v o lta g e M a x im u m fre q u e n c y R is e tim e F a ll tim e (1 ) T e s t C o n d itio n s M in 3 .5 T yp M ax 0 .8 U n its V V V µA V -5 0 V ≤ V IN ≤ V C C -1 0 V C C - 0 .0 2 5 V C C + 0 .3 10 0 .0 2 5 IO U T = 1 0 m A , V C C = 1 5 V IO U T = 1 0 m A , V C C = 1 5 V V C C = 1 5 V , e a c h o u tp u t 0 .8 0 .8 15 2 -0 .3 2 /3 V c c 1 /3 V c c C L = 1 .0 n F V c c = 1 5 V , m a x C W fre q u e n c y lim ite d b y p a c k a g e p o w e r d is s ip a tio n C L = 1 n F V c c = 1 5 V V O H = 2 V to 1 2 V C L = 4 n F V c c = 1 5 V V O H = 2 V to 1 2 V C L = 1 n F V c c = 1 5 V V O H = 2 V to 1 2 V C L = 4 n F V c c = 1 5 V V O H = 2 V to 1 2 V C L= 4 n F V c c = 1 5 V C L= 4 n F V c c = 1 5 V F W H M C L= 1 n F + 3 V to + 3 V C L = 1 n F V cc=15V V cc=15V V cc=15V V cc=15V 8 V IN = 3 .5 V V IN = 0 V V IN = + V C C 15 1 0 45 2 .5 4 .5 2 .0 3 .5 32 29 5 .0 7 .0 80 170 30 30 30 3 10 10 V c c + 0 .3 1 .2 1 .2 V Ω Ω A A .


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