Data Recovery. 1417K5A Datasheet

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1417K5A Datasheet
Recommendation 1417K5A Datasheet
Part 1417K5A
Description NetLight 1417K5A 2.5 Gbits/s 1300 nm Laser Transceiver with Clock and Data Recovery
Feature 1417K5A; Data Sheet August 2001 NetLight ® 1417K5A 2.5 Gbits/s 1300 nm Laser Transceiver with Clock and Data.
Manufacture Agere Systems
Datasheet
Download 1417K5A Datasheet




Agere Systems 1417K5A
Data Sheet
August 2001
NetLight ® 1417K5A 2.5 Gbits/s
1300 nm Laser Transceiver with Clock and Data Recovery
Applications
s SONET SR OC-48, SDH I-16 applications
s High-speed, optical data interface for shelf-to-shelf
interconnect
Available in a small form factor, RJ-45 size, plastic package,
the 1417K5A Transceiver is a high-performance, cost-effec-
tive, optical transceiver for SONET/SDH applications.
Features
s Small form factor, RJ-45 size, 20-pin package
s LC duplex receptacle
s Uncooled 1300 nm laser transmitter with automatic
output power control
s Transmitter disable input
s Wide dynamic range receiver with InGaAs PIN
photodetector
s Recovered clock outputs
s TTL signal-detect output
s Low power dissipation
s Single 3.3 V power supply
s LVPECL/CML compatible data inputs and CML
compatible data outputs
s Operating temperature range: 0 °C to
70 °C
s Agere Systems Inc. Reliability and Qualification
Program for built-in quality and reliability
Description
The 1417K5A transceiver is a high-speed, cost-effec-
tive optical transceiver intended for 2.488 Gbits/s
shelf-to-shelf optical interconnect applications as well
as SONET SR OC-48 and SDH I-16. The transceiver
features proven Agere Systems optics and is pack-
aged in a narrow-width plastic housing with an LC
duplex receptacle. The receptacle fits into an RJ-45
form factor outline. The 20-pin package pinout con-
forms to a multisource transceiver agreement.
The transmitter features the ability to interface to both
LVPECL and CML differential logic level data inputs.
The transmitter also features a TTL logic level disable
input and laser bias and back-facet monitor outputs.
The receiver features differential CML logic level data
and clock outputs, a TTL logic level signal-detect out-
put and direct access to the PIN photodetector bias
input for photocurrent monitoring purposes.



Agere Systems 1417K5A
NetLight 1417K5A 2.5 Gbits/s
1300 nm Laser Transceiver with Clock and Data Recovery
Data Sheet
August 2001
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-
lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess
of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended
periods can adversely affect device reliability.
Parameter
Supply Voltage
Operating Temperature Range
Storage Temperature Range
Lead Soldering Temperature/Time
Operating Wavelength Range
Symbol
Min
Max Unit
VCC
0
5V
TC 0 70 °C
Tstg –40 85 °C
250/10
°C/s
λ 1.1 1.6 µm
Qualification and Reliability
To help ensure high product reliability and customer satisfaction, Agere Systems is committed to an intensive qual-
ity program that starts in the design phase and proceeds through the manufacturing process. Optoelectronic mod-
ules are qualified to Agere Systems internal standards as well as other appropriate industry standards using MIL-
STD-883 test methods and procedures, and using sampling techniques consistent with Telcordia ® requirements.
In addition, Agere Systems has been certified to be in full compliance with the latest ISO ® -9001 Quality System
Standards.
Pin Information
10 9 8 7 6 5 4 3 2 1
11 12 13 14 15 16 17 18 19 20
RX
TX
Figure 1. 1417K5A Transceiver, 20-Pin Configuration (top view)
1-967(F).d
2 Agere Systems Inc.



Agere Systems 1417K5A
Data Sheet
August 2001
NetLight 1417K5A 2.5 Gbits/s
1300 nm Laser Transceiver with Clock and Data Recovery
Pin Information
Table 1. Transceiver Pin Descriptions
Pin
Number
MS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Symbol
MS
VPD
VEER
VEER
CLK–
CLK+
VEER
VCCR
SD
RD–
RD+
VCCT
VEET
TDIS
TD+
TD–
NIC
BMON
BMON+
PMON
PMON+
Name/Description
Receiver
Mounting Studs. The mounting studs are provided for transceiver
mechanical attachment to the circuit board. They may also provide an
optional connection of the transceiver to the equipment chassis
ground.
Photodetector Bias Input. This lead supplies bias for the PIN photo-
detector diode
Receiver Signal Ground.
Receiver Signal Ground.
Received Recovered Clock Out. The rising edge occurs at the rising
edge of the Received Data output. The falling edge occurs in the mid-
dle of the Received Data baud period.
Received Recover Clock Out. The falling edge occurs at the rising
edge of the Received Data output. The rising edge occurs in the mid-
dle of the Received Data baud period.
Receiver Signal Ground.
Receiver Power Supply.
Signal Detect.
Normal operation: logic 1 output.
Fault condition: logic 0 output
Received DATA Out.
Received DATA Out.
Transmitter
Transmitter Power Supply.
Transmitter Signal Ground.
Transmitter Disable.
Transmitter DATA In. An internal 50 termination is provided, con-
sisting of a 100 resistor between the TD+ and TD– pins.
Transmitter DATA In. See TD+ pin for terminations.
No Internal Connection.
Laser Diode Bias Current Monitor, Negative End. The laser bias
current is accessible as a dc voltage by measuring the voltage devel-
oped across pins 17 and 18.
Laser Diode Bias Current Monitor, Positive End. Optional feature;
if not used, do not connect. See pin 17 description.
Laser Diode Optical Power Monitor, Negative End. Optional fea-
ture; if not used, do not connect. The back-facet diode monitor cur-
rent is accessible as a voltage proportional to the photocurrent
through a 200 resistor between pins 19 and 20.
Laser Diode Optical Power Monitor, Positive End. Optional fea-
ture; if not used, do not connect. See pin 19 description.
Logic Family
NA
NA
NA
NA
CML
CML
NA
NA
LVTTL
CML
CML
NA
NA
LVTTL
LVPECL/CML
LVPECL/CML
NA
NA
NA
NA
NA
Agere Systems Inc.
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