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S5C7212X01-E0R0 Dataheets PDF



Part Number S5C7212X01-E0R0
Manufacturers Samsung semiconductor
Logo Samsung semiconductor
Description TIMING & SYNC. GENERATOR FOR B/W CCD
Datasheet S5C7212X01-E0R0 DatasheetS5C7212X01-E0R0 Datasheet (PDF)

B/W CCD PROCESSOR S1C7309X01 INTRODUCTION 48-QFP-0707 The S1C7309X01 is a bipolar monolithic integrated circuit for B/W CCD camera 1 chip signal processor. FUNCTION • • • • • • • • CDS (Correlated Double Sampling) AGC (Automatic Gain Control) Gamma & Knee Horizontal Aperture Video Setup Video Driver OP-Amp. Comparator FEATURE • • • • • • • • • • • 5 Steps Sample & Hold 4 to 32 dB AGC gain control Built-in 2 comparators for EE mode control EE mode WND/BLK selectable Gamma γ ·=· 0.40 to 0.65 .

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B/W CCD PROCESSOR S1C7309X01 INTRODUCTION 48-QFP-0707 The S1C7309X01 is a bipolar monolithic integrated circuit for B/W CCD camera 1 chip signal processor. FUNCTION • • • • • • • • CDS (Correlated Double Sampling) AGC (Automatic Gain Control) Gamma & Knee Horizontal Aperture Video Setup Video Driver OP-Amp. Comparator FEATURE • • • • • • • • • • • 5 Steps Sample & Hold 4 to 32 dB AGC gain control Built-in 2 comparators for EE mode control EE mode WND/BLK selectable Gamma γ ·=· 0.40 to 0.65 / Linear Built-in OP-Amp. for AGC loop Built-in Delay Line for Horizontal Aperture 3 Mode set-up control 2 Mode white-clip control 75 ohm video driver & sag compensation PACKAGE: 48-VQFP-0707 ORDERING INFORMATION Device S5C7212X01-E0R0 Package 48-QFP-0707 Operating -20 °C − 75 °C 1 S1C7309X01 BLOCK DIAGRAM 2 33 42 37 35 40 39 38 36 41 (CDS) (IRIS) + WND/ BLK B.G REF + (3.1V REG) OB CLAMP 46 45 (COMP) 43 ECL1 ECL2 1 (COMP) + - SHP1 SHP3 SHD2 SHP2 + IRIS - 2 SHD1 CLAMP (AGC) + AGC 4 MAX CTL (LPF) 10 14 12 GAMMA SW AGC DETECT 8 2 CLAMP 13 (OPAMP) + - 47 GAIN CTL LPF CONT 11 (GAMMA & KNEE) 9 15 (H-APERTURE) gm CTL DL2 + + DRIV 17 VCA VCA CTL 16 19 23 22 21 KNEE 4 GAMMA CTL 20 BUF CLAMP 1 OB DL1 - 3 5 (VIDEO SETUP) + DRIV 7.5K MIX 6 32 W/D CLIP VIDEO SETUP WHITE CLPCTL SYNC BLANK MIX 31 5 OB CLAMP GAMMA AMP LIN. AMP B/W CCD PROCESSOR 7 24 25 26 27 29 30 B/W CCD PROCESSOR S1C7309X01 PIN CONFIGURATION DUMMY-CLP COMP1,2-IN 38 COMP2-IN 48 PG-IN DATA-IN DGND AGC-OUT GAMMA-IN AGND G-CLP DET-OUT MAX-CTL 1 2 3 4 5 6 47 46 45 44 43 42 41 40 39 37 36 COMP1-OUT 35 COMP2-OUT 34 SVCC 33 OB-CLP 32 VIDEO-OUT 31 SAG-IN S1C7309X01 7 8 9 COMP1-IN 30 BLANK 29 SYNC-IN 28 SGND 27 WC-CTL 26 SETUP-CTL 25 VIDEO-IN 24 APER-OUT WND-BLK 20 DELAY-CTL GAIN-CTL 10 OP-OUT 11 OP-IN(-) 12 13 OP-IN(+) 14 LPF-R 15 GAMMA-CTL 16 KNEE-SW 17 GAMMA-OUT 18 HGND 19 A-CLP 21 APER-CTL 22 CLIP-CTL 23 VCA-CTL IRIS-OUT IRIS-CLP DVCC AVCC VREF SHD SHP 3 S1C7309X01 B/W CCD PROCESSOR PIN EXPLANATION Table 1. Pin No 1 Name PG-IN I/O I DC LEVEL 3.0 V PG-IN DATA-IN EQUIVALENT CIRCUIT 100 µ 2 DATA-IN I 3.0 V 3 DGND GND 200 AGC-OUT 4 AGC-OUT O 2.0 V 500 µ GAMMA-IN 5 GAMMA-IN I - 6 AGND GND G-CLP 7 G-CLP I/O - G-CLP 8 DET-OUT O 2.0 V 500 µ 400 µ 4 B/W CCD PROCESSOR S1C7309X01 Pin No Name I/O DC LEVEL 0 to 5 V 5V EQUIVALENT CIRCUIT 40 µ MAX-CTL 9 MAX-CTL I 3V 0V 0 to 5 V 5V GAIN-CTL 200 10 GAIN-CTL I 0V 120 µ 3V 350 µ OP-OUT 11 OP-OUT O - 12 OP-IN(-) I OP-IN(+) OP-IN(-) 13 OP-IN(+) I - 20 µ 1.7 V 20 µ 14 LPF-R I/O 2.5 V 2.5 V LPF-R 5 S1C7309X01 B/W CCD PROCESSOR Pin No Name I/O DC LEVEL 0 to 5 V 5V EQUIVALENT CIRCUIT 100 K GAMMA-CTL 100 K 15 GAMMA-CTL I 35 µ 35 µ 0V 5V KNEE-SW 30 K 16 KNEE-SW I 0V 20 K 200 GAMMA-OUT 17 GAMMA-OUT O 1.9 V 500 µ 18 HGND GND - A-CLP 19 A-CLP I/O - 0 to 5 V 5V 100 K DELAY-CTL 20 DELAY-CTL I 0V 6 B/W CCD PRO.


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