256Mbit SDRAM 16M x 4bit x 4 Banks Synchronous DRAM LVTTL
K4S560432B
CMOS SDRAM
256Mbit SDRAM
16M x 4bit x 4 Banks Synchronous DRAM LVTTL
Revision 0.2 May. 2000
* Samsung Ele...
Description
K4S560432B
CMOS SDRAM
256Mbit SDRAM
16M x 4bit x 4 Banks Synchronous DRAM LVTTL
Revision 0.2 May. 2000
* Samsung Electronics reserves the right to change products or specification without notice.
Rev. 0.2 May.2000
K4S560432B
CMOS SDRAM
Revision 0.1 (March 10, 2000)
Deleted -80 Product Specification Changed the Current values of ICC5, ICC6 Changed tOH of -75 Product from 2.7ns to 3ns Changed the Bank select address in SIMPLIFIED TRUTH TABLE Notes 4. BA0 Low Low High High BA1 Low High Low High Before Bank A Bank B Bank C Bank D After Bank A Bank C Bank B Bank D
Revision 0.2 (May 30, 2000)
Eliminate "Preliminary" Add "133MHz" in IBIS SPECIFICATION
Rev. 0.2 May.2000
K4S560432B
16M x 4Bit x 4 Banks Synchronous DRAM
FEATURES
JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock. Burst read single-bit write operation DQM for masking Auto & self refresh 64ms refresh period (8K cycle) Part No. K4S560432B-TC/L75 K4S560432B-TC/L1H K4S560432B-TC/L1L
CMOS SDRAM
GENERAL DESCRIPTION
The K4S560432B is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 16,785,216 words by 4 bits, fabricated with SAMSUNG's high performance CMOS technology. Synchronous design allows precise cycle con...
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