K9K1216U0C

K9K1208Q0C K9K1208D0C K9K1208U0C K9K1216Q0C K9K1216D0C K9K1216U0C FLASH MEMORY Document Title 64M x 8 Bit , 32M x 16 Bit NAND Flash Memory Revision History Revision No. History 0.0 1.0 Initial issue. 1.Pin assignment of TBGA dummy ball is changed. (before) DNU --> (after) N.C 2. Add the Rp vs tr ,tf & Rp vs ibusy graph for 1.8V device (Page 34) 3. Add the data protection Vcc guidence for 1.8V device - below about 1.1V. (Page 35) 4. Add the specification of Block Lock scheme.(Page 29~32) 5. Pin assignment of TBGA A3 ball is changed. (before) N.C --> (after) Vss 2.0 1. The Maximum operating current is changed. Read : Icc1 20mA-->30mA Program : Icc2 20mA-->40mA Erase : Icc3 20mA-->40mA The min. Vcc value 1.8V devices is changed. K9K12XXQ0C : Vcc 1.65V~1.95V --> 1.70V~1.95V Pb-free Package is added. K9K1208U0C-HCB0,HIB0 K9K12XXQ0C-HCB0,HIB0 K9K1216U0C-HCB0,HIB0 K9K1216Q0C-HCB0,HIB0 Errata is added.(Front Page)-K9K12XXQ0C tWC tWP tRC tREH tRP tREA tCEA Specification 45 25 50 15 25 30 45 Relaxed value 60 40 60 20 40 40 55 1. Max. Thickness of TBGA packge is changed. 0.09±0.10(Before) --> 1.10±0.10(After) 2. New definition of the number of invalid blocks is added. (Minimum 1004 valid blocks are guaranteed for each contiguous 128Mb memory space.) 1. The guidence of LOCKPRE pin usage is changed. Don’t leave it N.C. Not using LOCK MECHANISM & POWER-ON AUTOREAD, connect it Vss.(Before) --> Not using LOCK MECHANISM & POWER-ON AUTO-READ, connect it Vss or leave it N.C(After) 2. 2.65V ...