K9K1G08U0M-YIB0

K9K1G08U0M-YCB0, K9K1G08U0M-YIB0 Document Title 128M x 8 Bit NAND Flash Memory Revision History Revision No 0.0 0.1 0.2 FLASH MEMORY History 1. Initial issue 1.[Page 31] device code (76h) --> device code (79h) 1.Powerup sequence is added : Recovery time of minimum 1 µs is required before internal circuit gets ready for any command sequences Draft Date Apr. 7th 2001 Jul. 3rd 2001 Remark Jul. 23th 2001 2.5V VCC High ≈ 2.5V W P W E 2. AC parameter tCLR(CLE to RE Delay, min 50ns) is added. 3. [Page28] Only address A 14 to A 25 is valid while A9 to A 13 is ignored --> Only address A 14 to A 26 is valid while A 9 to A 13 is ignored 0.3 (page 30) Sep. 13th 2001 A14 and A15 must be the same between source and target page --> A14 , A15 and A26 must be the same between source and target page Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site. http://www.intl.samsungsemi.com/Memory/Flash/datasheets.html The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have any questions, please contact the SAMSUNG branch office near your office. ≈ 1µ ≈ 1 K9K1G08U0M-YCB0, K9K1G08U0M-YIB0 128M x 8 Bit NAND Flash Memory Features Voltage Supply : 2.7V~3.6V Organization - Memory Cell Array : (128M + 4,096K)bit x 8bit - Data Register :...