SAA6750H

INTEGRATED CIRCUITS DATA SHEET SAA6750H Encoder for MPEG2 image recording (EMPIRE) Product specification Supersedes data of 1998 Sep 07 File under Integrated Circuits, IC02 2000 May 03 Philips Semiconductors Product specification Encoder for MPEG2 image recording (EMPIRE) CONTENTS 1 2 2.1 2.2 2.3 2.3.1 2.3.2 2.3.3 2.3.4 2.3.5 3 4 5 6 7 7.1 7.1.1 7.1.2 7.2 7.2.1 7.2.2 7.2.3 7.2.4 7.3 7.3.1 7.3.2 7.3.3 7.4 7.4.1 7.4.2 7.5 7.5.1 7.5.2 7.6 7.6.1 7.6.2 7.6.3 7.7 7.7.1 FEATURES GENERAL DESCRIPTION General Function Application fields General Video editing (PC applications) Camera signal transmission Video recording for surveillance Digital VCR QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Global architecture description General Architecture structure Start-up and operating modes Start-up requirements Reset processing Description of operating modes Pin behaviour Video front-end and formatter General Data input format Functional description Macroblock processor General Functional description Bitstream assembly General Pre-packer and packer Data output port General Data output format Functional description Application Specific Instruction-set Processor (ASIP) General 7.8 7.8.1 7.9 7.9.1 7.9.2 7.9.3 7.9.4 7.9.5 7.10 7.10.1 7.10.2 7.10.3 7.11 7.12 7.13 7.14 7.14.1 7.14.2 7.14.3 8 9 10 11 12 13 13.1 13.2 13.3 13.4 13.5 14 15 16 17 SAA6750H Global controller General I2C-bus interface and controller General Special considerations I2C-bus data tra...