Digital video encoder DENC2-SQ
INTEGRATED CIRCUITS
DATA SHEET
SAA7187 Digital video encoder (DENC2-SQ)
Preliminary specification File under Integrated...
Description
INTEGRATED CIRCUITS
DATA SHEET
SAA7187 Digital video encoder (DENC2-SQ)
Preliminary specification File under Integrated Circuits, IC22 1995 Sep 21
Philips Semiconductors
Preliminary specification
Digital video encoder (DENC2-SQ)
FEATURES CMOS 5 V device Digital PAL/NTSC encoder System pixel frequency selectable for 12.27 MHz (60 Hz fields) or 14.75 MHz (50 Hz fields) 24-bit wide YUV input port or 16-bit wide YUV input port or Input data format Cb, Y, Cr, etc. (CCIR 656) I2C-bus control port MPU parallel control port Encoder can be master or slave Programmable horizontal and vertical input synchronization phase Programmable horizontal sync output phase OSD overlay with Look-Up Tables (LUTs) 8 × 3 bytes Line 21 Closed Caption encoder Cross-colour reduction DACs operating at twice oversampling with 10-bit resolution Controlled rise/fall times of output syncs and blanking QUICK REFERENCE DATA SYMBOL VDDA VDDD IDDA IDDD Vi Vo(p-p) RL ILE DLE Tamb analog supply voltage digital supply voltage analog supply current digital supply current input signal voltage levels analog output signal voltages Y, C and CVBS without load − (peak-to-peak value) load resistance LF integral linearity error LF differential linearity error operating ambient temperature 80 − − 0 PARAMETER MIN. 4.75 4.5 − − TYP. 5.0 5.0 50 175 2 − − − − Down-mode of DACs
SAA7187
CVBS and S-Video output simultaneously PLCC68 package. GENERAL DESCRIPTION The SAA7187 encodes digital Y...
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