XRT73L00

áç AUGUST 2002 XRT73L00A E3/DS3/STS-1 LINE INTERFACE UNIT REV. 2.0.1 GENERAL DESCRIPTION The XRT73L00A DS3/E3/STS-1 Line Interface Unit is an improved version of the XRT73L00 and consists of a line transmitter and receiver integrated on a single chip and is designed for DS3, E3 or SONET STS-1 applications. XRT73L00A can be configured to support the E3 (34.368 Mbps), DS3 (44.736 Mbps) or the SONET STS-1 (51.84 Mbps) rates. In the transmit direction, the XRT73L00A encodes input data to either B3ZS (for DS3/STS-1 applications) or HDB3 (for E3 applications) format and converts the data into the appropriate pulse shapes for transmission over coaxial cable via a 1:1 transformer. In the receive direction the XRT73L00A performs equalization on incoming signals, performs Clock Recovery, decodes data from either B3ZS or HDB3 format, converts the receive data into TTL/CMOS format, checks for LOS or LOL conditions and detects and declares the occurrence of line code violations. The XRT73L00A also contains a 4-Wire Microprocessor Serial Interface for accessing the on-chip Command registers. FIGURE 1. BLOCK DIAGRAM OF THE XRT73L00A E3 S T S -1 /D S 3 H o s t/(H W ) FEATURES Incorporates an improved Timing Recovery circuit and is pin and functional compatible to XRT73L00 Meets E3/DS3/STS-1 Jitter Tolerance Requirements Full Loop-Back Capability Transmit and Receive Power Down Modes Full Redundancy Support Contains a 4-Wire Microprocessor Serial Interface Uses Minimum Extern...