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YGV619 Dataheets PDF



Part Number YGV619
Manufacturers LSI Computer Systems
Logo LSI Computer Systems
Description Advanced Video Display Processor
Datasheet YGV619 DatasheetYGV619 Datasheet (PDF)

YGV619 AVDP6 Advanced Video Display Processor 6 s Outline YGV619 is a VDP (Video Display Processor) adopting OSD display control system which is best suited to the data broadcasting. The digital image interface of this device for connection with MPEG decoder has been improved. The use of this device allows screen composition that is suited to mobile information terminals, car navigation system, etc. Scan timing conforming to the display standard of digital TVs can be made. Two built-in PLL circu.

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YGV619 AVDP6 Advanced Video Display Processor 6 s Outline YGV619 is a VDP (Video Display Processor) adopting OSD display control system which is best suited to the data broadcasting. The digital image interface of this device for connection with MPEG decoder has been improved. The use of this device allows screen composition that is suited to mobile information terminals, car navigation system, etc. Scan timing conforming to the display standard of digital TVs can be made. Two built-in PLL circuits allows to realize superimposition of external image signal on original image signal, and to produce clock best suited to SDRAM that is adopted as external video memory. s Features q Display planes: External digital image is overlaid with OSD images composed of regions. Up to four planes, which are individually composed of back drop plane (plane on which external images are inputted) + region, are available. q OSD image format: 8bit/dot palette mode, and 16 bit RGB or YCbCr format can be selected. YCbCr conforms to the conversion method of ITU601. Color palette (256 colors in 16777 k colors) can be specified by region. q Digital image input format: · 18bitR6G6B6 · 16bitYCbCr422 · 8bitITU656 (Max. dot clock frequency: 80 MHz) (Max. dot clock frequency: 80 MHz) (Dot clock frequency 27 MHz) q Digital image output format: · R6G6B6 + 2 bit AT · 18bitYCbCr444 + 2 bit AT · 16bitYCbCr422 + 2 bit AT · 8bitITU656 + 2 bit AT + 6 bit α blending coefficient q Max. OSD resolution: 960 dots × 1080 lines q Applicable digital TV image format: (However, max. resolution of overlaid external image is 1920 ×1080 lines) · 525i · 525p · 1125i q Video capture function: · Draws external image input on the frame memory in real time. · Can convert resolution. · Provided with progressive scanning conversion YGV619 CATALOG CATALOG No.: LSI-4GV619A1 2001.01 YGV619 q Priority of display planes Regular priority: Plane D > Plane C > Plane B > Plane A > Back drop plane The priority can be changed by region. q α blending function (64 intensity level) Blending weight can be set by dot. q Flicker cancel filter is built in. Enabling / disabling flicker cancel function can be set by region. q 8 bit DACs are built in for R, G and B individually. (Max. operating frequency: 80 MHz) q Two PLLs are built in. (1: Generates SDRAM clock and system clock 2: Generates dot clock) q Display monitor control · Display resolution and scanning frequency can be set optionally. This function is compatible with progressive scanning and interlaced scanning modes. NTSC subcarrier output q SDRAM can be added externally as VRAM (SDRAM generation clock frequency: Max. 80 MHz.) ·16 bit bus 512k words × 16 bits × 2 banks × 1 pc. 1M words × 16 bits × 4 banks × 1 pc. 2M words × 16 bits × 2 banks × 1 pc. ·32 bit bus 512k words × 16 bits × 2 banks × 2 pcs. 512k words × 32 bits × 4 banks × 1 pc. 1M words × 16 bits × 4 banks × 2 pcs. 2M words × 16 bits × 2 banks × 2 pcs. q CPU interface (capacity: 2M bytes) (capacity: 8M bytes) (capacity: 8M bytes) (capacity: (capacity: (capacity: (capacity: 4M bytes) 8M bytes) 16M bytes) 16M bytes) Compatible with 16/32 bit CPU. Various built-in tables can be mapped on CPU space. Compatible with little endian and big endian q Package: 240SQFP (YGV619-S) q Operating temperature range: -45 to +85°C q Power supply: 3.3V, single power supply Supplementary information: For YGV619, Application Manual that details the specifications of the device and the evaluation board (MSY619DB01) are available in addition to this brochure. The evaluation board is equipped with an SDRAM of 16 MB as a video memory. A high performance system can be realized when it is used with Hitachi’s CPU board, Super H Solution Engine. The device driver provided by Yamaha and attached to the evaluation board consists of the main body of the driver and API related layers, allowing the user to build it into the system easily according to the environment. For the details of these products, inquire of the sales agents or our business offices. For CPU board, inquire of: Hitachi ULSI Systems Co., Ltd. Tel:+81-42-351-6600 2 YGV619 s Block Diagram D31-0 A23-2 CSREG CSMEM DREQ RD A1/WR3 WR2-0 WAIT READY INT RESET CPU INTERFACE DRAWING PROCESSOR UNIT SDRAM INTERFACE SDQ31-0 SA12-0 SBA1-0 SCS RAS CAS WE SYCKIN SYCKOUT VIDEO CAPTURE CONTROLLER DQM3-0 SDCLK FSC CSYNC HSYNC HSIN VSIN CRT CONTROLLER DCKIN DCKOUT GCKIN DRI[5:0] DGI[5:0] DBI[5:0] DAC PIXEL DATA CONTROLLER AT1-0 GCKOUT DRO[5:0] DGO[5:0] DBO[5:0] R, G, B AVDP6 performs parallel processing including operation of writing display data into video memory (SDRAM) connected on the local bus (drawing function) and operation of sequentially reading bit map image stored in the video memory in accordance with monitor scanning (display function). Drawing function: This function transfers bit map image data configured on the external memory of CPU to video memory. For the transfer of the data, a method that maps the v.


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