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Z86E21 Dataheets PDF



Part Number Z86E21
Manufacturers Zilog.
Logo Zilog.
Description CMOS Z8 OTP MICROCONTROLLER
Datasheet Z86E21 DatasheetZ86E21 Datasheet (PDF)

CUSTOMER P ROCUREMENT S PECIFICA TION Z86E21 CMOS Z8® OTP MICROCONTROLLER GENERAL DESCRIPTION The Z86E21 microcontroller (MCU) introduces the next level of sophistication to single-chip architecture. The Z86E21 is a member of the Z8 single-chip microcontroller family with 8 Kbytes of EPROM and 236 bytes of general purpose RAM. The Z86E21 is a pin compatible, One-Time-Programmable (OTP) version of the Z86C21. The Z86E21 contains 8 Kbytes of EPROM memory in place of the 8 Kbyte of ROM on the Z86C.

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CUSTOMER P ROCUREMENT S PECIFICA TION Z86E21 CMOS Z8® OTP MICROCONTROLLER GENERAL DESCRIPTION The Z86E21 microcontroller (MCU) introduces the next level of sophistication to single-chip architecture. The Z86E21 is a member of the Z8 single-chip microcontroller family with 8 Kbytes of EPROM and 236 bytes of general purpose RAM. The Z86E21 is a pin compatible, One-Time-Programmable (OTP) version of the Z86C21. The Z86E21 contains 8 Kbytes of EPROM memory in place of the 8 Kbyte of ROM on the Z86C21. The MCU is housed in a 40-pin DIP, 44-pin Leaded ChipCarrier, or a 44-pin Quad Flat Pack, and is manufactured in CMOS technology. The ROMless pin option is available on the 44-pin versions only. The MCU can address both external memory and preprogrammed ROM which enables this Z8 microcomputer to be used in high volume applications or where code flexibility is required. Zilog’s CMOS microcontroller offers fast execution, efficient use of memory, sophisticated interrupts, input/output bit manipulation capabilities, and easy hardware/software system expansion along with low cost and low power consumption. The Z86E21 architecture is based on Zilog’s 8-bit microcontroller core. The device offers a flexible I/O scheme, an efficient register and address space structure, multiplexed capabilities between address/data, I/O, and a number of ancillary features that are useful in many industrial and advanced scientific applications. The device applications demand powerful I/O capabilities. The Z86E21 fulfills this with 32-pin dedicated to input and output. These lines are grouped into four ports. Each port consists of eight lines, and is configurable under software control to provide timing, status signals, serial or parallel I/O with or without handshake, and an address/data bus for interfacing external memory. There are three basic address spaces available to support this wide range of configuration: Program Memory, Data Memory and 236 General-Purpose registers. To unburden the program from coping with real-time problems such as counting/timing and serial data communication, the Z86E21 offers two on-chip counter/timers with a large number of user selectable modes, and an asynchronous receiver/transmitter (UART) (see Functional Block Description). In ROM Protect Mode, the instructions LDC, LDCI, LDE and LDEI are disabled when reading address locations %0000 to %1FFF. Notes: All Signals with a preceding front slash, "/", are active Low, e.g.: B//W (WORD is active Low); /B/W (BYTE is active Low, only). Power connections follow conventional descriptions below: Connection Power Ground Circuit VCC GND Device VDD VSS PRODUCT RECOMMENDATIONS Zilog recommends the following programming equipment for use with this One-Time-Programmable product: Recommended Revision Level Hardware Software B 1.5 1.1 3.7 Device Z86E21 Z86E21 Z86E21 Zilog Support Tool Z86C1200ZEM ICEBOX ™ Emulator* (*Does not support 4K/8K option.) Data I/O 3900 Programmer* (*Does not support option bits.) Data I/O Unisite Programmer* (*Does not support option bits.) Some non-Zilog programmers may have different programming waveforms, voltages and timings and not all programmers may meet the programming requirements of Zilog's One-Time-Programmable products. DC-2964-10 If difficulty is encountered in programming a Zilog OTP product, please contact your local Zilog sales office. 1 GENERAL DESCRIPTION (Continued) Output Input Vcc GND XTAL /AS /DS R//W /RESET Port 3 Machine Timing and Instruction Control UART ALU Counter/ Timers (2) FLAGS Prg. Memory 8192 x 8-Bit Interrupt Control Register Pointer Register File 256 x 8-Bit Program Counter Port 2 Port 0 Port 1 4 I/O (Bit Programmable) 4 8 Address/Data or I/O (Byte Programmable) Address or I/O (Nibble Programmable) Functional Block Diagram 2 PIN DESCRIPTION Standard Mode VCC XTAL2 XTAL1 P37 P30 /RESET R//W /DS /AS P35 GND P32 P00 P01 P02 P03 P04 P05 P06 P07 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 P36 P31 P27 P26 P25 P24 P23 P22 P21 P20 P33 P34 P17 P16 P15 P14 P13 P12 P11 P10 Z86E21 DIP 31 30 29 28 27 26 25 24 23 22 21 40-Lead DIP Pin Assignments 40-Lead DIP Pin Identification Pin # 1 2 3 4 5 6 7 8 9 10 Symbol V CC XTAL2 XTAL1 P37 P30 /RESET R//W /DS /AS P35 Function Power Supply Crystal, Oscillator Clock Crystal, Oscillator Clock Port 3 pin 7 Port 3 pin 0 Reset Read/Write Data Strobe Address Strobe Port 3 pin 5 Direction Input Output Input Output Input Input Output Output Output Output Pin # 11 12 13-20 21-28 29 30 31-38 39 40 Symbol GND P32 P00-P07 P10-P17 P34 P33 P20-P27 P31 P36 Function Ground, GND Port 3 pin 2 Port 0 pin 0,1,2,3,4,5,6,7 Port 1 pin 0,1,2,3,4,5,6,7 Port 3 pin 4 Port 3 pin 3 Port 2 pin 0,1,2,3,4,5,6,7 Port 3 pin 1 Port 3 pin 6 Direction Input Input In/Output In/Output Output Input In/Output Input Output 3 PIN DESCRIPTION (Continued) Standard Mode XTAL1 XTAL2 VCC P30 P37 P36 P31 P27 P26 P25 N/C 6 /RESET R//W /DS /AS P35 GND P32 P00 P01 P02 .


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