X9258 XDCP Datasheet

X9258 Datasheet, PDF, Equivalent


Part Number

X9258

Description

Quad Digital Controlled Potentiometers (XDCP)

Manufacture

Xicor

Total Page 22 Pages
Datasheet
Download X9258 Datasheet


X9258
APPLICATION NOTES
AVAILABLE
AN99 • AN115 • AN120 • AN124 • AN133 • AN134 • AN135
Low Noise/Low Power/2-Wire Bus/256 Taps
X9258
Quad Digital Controlled Potentiometers (XDCP)
FEATURES
• Four potentiometers in one package
• 256 resistor taps/pot–0.4% resolution
• 2-wire serial interface
• Wiper resistance, 40typical @ V+ = 5V, V- = -5V
• Four nonvolatile data registers for each pot
• Nonvolatile storage of wiper position
• Standby current < 5µA max (total package)
• Power supplies
—VCC = 2.7V to 5.5V
—V+ = 2.7V to 5.5V
—V- = -2.7V to -5.5V
• 100K, 50Ktotal pot resistance
• High reliability
—Endurance – 100,000 data changes per bit per
register
—Register data retention – 100 years
• 24-lead SOIC, 24-lead TSSOP, 24-lead CSP (Chip
Scale Package)
• Dual supply version of X9259
DESCRIPTION
The X9258 integrates 4 digitally controlled
potentiometers (XDCP) on a monolithic CMOS
integrated circuit.
The digitally controlled potentiometer is implemented
using 255 resistive elements in a series array.
Between each element are tap points connected to the
wiper terminal through switches. The position of the
wiper on the array is controlled by the user through the
2-wire bus interface. Each potentiometer has
associated with it a volatile Wiper Counter Register
(WCR) and 4 nonvolatile Data Registers (DR0:DR3)
that can be directly written to and read by the user.
The contents of the WCR controls the position of the
wiper on the resistor array though the switches. Power
up recalls the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
BLOCK DIAGRAM
VCC
VSS
V+
V-
WP
SCL
SDA
A0
A1
A2
A3
Interface
and
Control
Circuitry
8
Data
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Pot 0
VH0/RH0
VL0/RL0
VW0/RW0
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 2
VH2/RH2
VL2/RL2
VW2/RW2
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
VW1/RW1
Resistor
Array
Pot 1
VH1/RH1
VL1/RL1
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 3
VW3/RW3
VH3/RH3
VL3/RL3
REV 1.1.7 2/4/03
www.xicor.com
Characteristics subject to change without notice. 1 of 22

X9258
X9258
PIN DESCRIPTIONS
Host Interface Pins
SERIAL CLOCK (SCL)
The SCL input is used to clock data into and out of the
X9258.
SERIAL DATA (SDA)
SDA is a bidirectional pin used to transfer data into
and out of the device. It is an open drain output and
may be wire-ORed with any number of open drain or
open collector outputs. An open drain output requires
the use of a pull-up resistor. For selecting typical
values, refer to the guidelines for calculating typical
values on the bus pull-up resistors graph.
DEVICE ADDRESS (A0A3)
The Address inputs are used to set the least
significant 4 bits of the 8-bit slave address. A match in
the slave address serial data stream must be made
with the address input in order to initiate
communication with the X9258. A maximum of 16
devices may occupy the 2-wire serial bus.
Potentiometer Pins
VH/RH (VH0/RH0–VH3/RH3), VL/RL (VL0/RL0–VL3/RL3)
The VH/RH and VL/RL inputs are equivalent to the
terminal connections on either end of a mechanical
potentiometer.
VW/RW (VW0/RW0–VW3/RW3)
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when low prevents nonvolatile writes to
the Data Registers.
Analog Supplies V+, V-
The Analog Supplies V+, V- are the supply voltages
for the DCP analog section.
PIN CONFIGURATION
NC
A0
VW3/RW3
VH3/RH3
VL3/RL3
V+
VCC
VL0/RL0
VH0/RH0
VW0/RW0
A2
WP
SOIC/TSSOP
1 24
2 23
3 22
4 21
5 20
6 19
X9258
7 18
8 17
9 16
10 15
11 14
12 13
A3
SCL
VL2/RL2
VH2/RH2
VW2/RW2
V–
VSS
VW1/RW1
VH1/RH1
VL1/RL1
A1
SDA
CSP
1 2 34
A RW0
RL0
B
VCC
C
V+
D
RL3
E
RW3
F
A2
WP
RH0
RH3
NC
A0
A1 RL1
SDA
RW1
RH1
VSS
RH2 V-
A3 RW2
SCL
RL2
Top View–Bumps Down
REV 1.1.7 2/4/03
www.xicor.com
Characteristics subject to change without notice. 2 of 22


Features APPLICATION NOTES A V A I L A B L E AN99 • AN115 • AN120 • AN124 • AN13 3 • AN134 • AN135 Low Noise/Low Po wer/2-Wire Bus/256 Taps X9258 Quad Dig ital Controlled Potentiometers (XDCP™ ) FEATURES • • • • • • • • Four potentiometers in one package 256 resistor taps/pot–0.4% resolution 2-wire serial interface Wiper resistan ce, 40Ω typical @ V+ = 5V, V- = -5V F our nonvolatile data registers for each pot Nonvolatile storage of wiper posit ion Standby current < 5µA max (total p ackage) Power supplies —VCC = 2.7V to 5.5V —V+ = 2.7V to 5.5V —V- = -2.7 V to -5.5V 100KΩ, 50KΩ total pot re sistance High reliability —Endurance – 100,000 data changes per bit per re gister —Register data retention – 1 00 years 24-lead SOIC, 24-lead TSSOP, 2 4-lead CSP (Chip Scale Package) Dual su pply version of X9259 DESCRIPTION The X 9258 integrates 4 digitally controlled potentiometers (XDCP) on a monolithic C MOS integrated circuit. The digitally controlled potentiometer is implemented using 255 resistive elements in a seri.
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