X9409 Potentiometers Datasheet

X9409 Datasheet, PDF, Equivalent


Part Number

X9409

Description

Quad Digitally Controlled Potentiometers

Manufacture

Xicor

Total Page 21 Pages
Datasheet
Download X9409 Datasheet


X9409
APPLICATION NOTES
AVAILABLE
AN99 • AN115 • AN120 • AN124 • AN133 • AN134 • AN135
Low Noise/Low Power/2-Wire Bus
X9409
Preliminary Information
Quad Digitally Controlled Potentiometers (XDCP)
FEATURES
• Four potentiometers per package
• 64 resistor taps
• 2-wire serial interface for write, read, and trans-
fer operations of the potentiometer
• 50Wiper resistance, typical at 5V.
• Four non-volatile data registers for each
potentiometer
• Non-volatile storage of multiple wiper position
• Power on recall. Loads saved wiper position on
power up.
• Standby current < 1µA typical
• System VCC: 2.7V to 5.5V operation
• 10K, 2.5KEnd to end resistance
• 100 yr. data retention
• Endurance: 100,000 data changes per bit per
register
• Low power CMOS
• 24-lead SOIC, 24-lead TSSOP, and
24-lead CSP (Chip Scale Package) Packages
DESCRIPTION
The X9409 integrates 4 digitally controlled
potentiometers (XDCP) on a monolithic CMOS
integrated microcircuit.
The digitally controlled potentiometer is implemented
using 63 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the 2-wire
bus interface. Each potentiometer has associated with
it a volatile Wiper Counter Register (WCR) and 4
nonvolatile Data Registers (DR0:DR3) that can be
directly written to and read by the user. The contents
of the WCR controls the position of the wiper on the
resistor array through the switches. Power up recalls
the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
BLOCK DIAGRAM
VCC
VSS
WP
SCL
SDA
A0
A1
A2
A3
Interface
and
Control
Circuitry
8
Data
REV 1.6 1/30/03
Pot 0
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
VH0/RHO
VL0/
RLO
VW0/
RWO
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 2
VH2/RH2
VL2/RL2
VW2/RW2
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 1
VW1/
RW1
VH1/
RH1
VL1/RL1
www.xicor.com
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 3
VW3/RW3
VH3/RH3
VL3/RL3
Characteristics subject to change without notice. 1 of 21

X9409
X9409 – Preliminary Information
PIN DESCRIPTIONS
Host Interface Pins
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
X9409.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into
and out of the device. It is an open drain output and
may be wire-ORed with any number of open drain or
open collector outputs. An open drain output requires
the use of a pull-up resistor. For selecting typical
values, refer to the guidelines for calculating typical
values on the bus pull-up resistors graph.
Device Address (A0A3)
The address inputs are used to set the least significant
4 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with
the X9409. A maximum of 16 devices may occupy the
2-wire serial bus.
Potentiometer Pins
VH0/RH0–VH3/RH3, VL0/RL0–VL3/RL3
The VH/RH and VL/RL inputs are equivalent to the
terminal connections on either end of a mechanical
potentiometer.
VW0/RW0–VW3/RW3
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when low prevents nonvolatile writes to
the Data Registers.
PIN NAMES
Symbol
SCL
SDA
A0-A3
VH0/RH0–VH3/RH3,
VL0/RL0–VL3/RL3
VW0/RW0–VW3/RW3
WP
VCC
VSS
NC
Description
Serial Clock
Serial Data
Device Address
Potentiometer Pin
(terminal equivalent)
Potentiometer Pin
(wiper equivalent)
Hardware Write Protection
System Supply Voltage
System Ground (Digital)
No Connection
PIN CONFIGURATION
VCC
VL0/RL0
VH0/RH0
VW0/RW0
A2
WP
SDA
A1
VL1/RL1
VH1/RH1
VW1/RW1
V
SS
SOIC
1 24
2 23
3 22
4 21
5 20
6 19
X9409
7 18
8 17
9 16
10 15
11 14
12 13
CSP
NC
VL3/RL3
VH3/RH3
VW3/RW3
A0
NC
A3
SCL
VL2/RL2
VH2/RH2
VW2/RW2
12
34
A VW0/RW0
A2
A1 VL1/RL1
VL0/RL0 WP
B
SDA VW1/RW1
VCC VH0/RH0 VH1/RH1 VSS
C
NC VH3/RH3 VH2/RH2 NC
D
VL3/RL3 NC
E
A3 VW2/RW2
VW3/RW3 A 0
F
SCL VL2/RL2
NC Top View–Bumps Down
SDA
A1
VL1/RL1
VH1/RH1
VW1/RW1
VSS
NC
VW2/RW2
VH2/RH2
VL2/RL2
SCL
A3
TSSOP
1 24
2 23
3 22
4 21
5 20
6 19
X9409
7 18
8 17
9 16
10 15
11 14
12 13
WP
A2
VW0/RW0
VH0/RH0
VL0/RL0
VCC
NC
VL3/RL3
VH3/RH3
VW3/RW3
A0
NC
REV 1.6 1/30/03
www.xicor.com
Characteristics subject to change without notice. 2 of 21


Features APPLICATION NOTES A V A I L A B L E AN99 • AN115 • AN120 • AN124 • AN13 3 • AN134 • AN135 Low Noise/Low Po wer/2-Wire Bus X9409 FEATURES • Four potentiometers per package • 64 resi stor taps • 2-wire serial interface f or write, read, and transfer operations of the potentiometer • 50Ω Wiper r esistance, typical at 5V. • Four non- volatile data registers for each potent iometer • Non-volatile storage of mul tiple wiper position • Power on recal l. Loads saved wiper position on power up. • Standby current < 1µA typical • System VCC: 2.7V to 5.5V operation • 10KΩ, 2.5KΩ End to end resistan ce • 100 yr. data retention • Endur ance: 100,000 data changes per bit per register • Low power CMOS • 24-lead SOIC, 24-lead TSSOP, and 24-lead CSP ( Chip Scale Package) Packages DESCRIPTIO N Preliminary Information Quad Digita lly Controlled Potentiometers (XDCP™) The X9409 integrates 4 digitally cont rolled potentiometers (XDCP) on a monolithic CMOS integrated microcircuit. The digitally controlled potentiomete.
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