Controlled Potentiometer. X9410 Datasheet

X9410 Datasheet PDF, Equivalent


Part Number

X9410

Description

Dual Digitally Controlled Potentiometer

Manufacture

Xicor

Total Page 21 Pages
PDF Download
Download X9410 Datasheet


X9410 Datasheet
APPLICATION NOTES
AVAILABLE
AN99 • AN115 • AN120 • AN124 • AN133 • AN134 • AN135
Low Noise/Low Power/SPI Bus
X9410
Dual Digitally Controlled Potentiometer (XDCP)
FEATURES
• Two potentiometers in one package
• SPI serial interface
• Register oriented format
—Direct read/write/transfer wiper positions
—Store as many as four positions per
potentiometer
• Power supplies
—VCC = 2.7V to 5.5V
—V+ = 2.7V to 5.5V
—V– = –2.7V to –5.5V
• Low power CMOS
—Standby current < 1µA
• High reliability
—Endurance–100,000 data changes per bit per
register
—Register data retention–100 years
• 8-bytes of nonvolatile EEPROM memory
• 10Kresistor arrays
• Resolution: 64 taps each pot
• 24-lead TSSOP, 24-lead SOIC and 24-pin plastic
DIP packages
DESCRIPTION
The X9410 integrates two digitally controlled
potentiometers (XDCP) on a monolithic CMOS
integrated microcircuit.
The digitally controlled potentiometer is implemented
using 63 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the SPI bus
interface. Each potentiometer has associated with it a
volatile Wiper Counter Register (WCR) and 4
nonvolatile Data Registers (DR0:DR3) that can be
directly written to and read by the user. The contents
of the WCR controls the position of the wiper on the
resistor array through the switches. Power up recalls
the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
BLOCK DIAGRAM
VCC
VSS
V+
V-
HOLD
CS
SCK
SO
SI
A0
A1
WP
Interface
and
Control
Circuitry
8
Data
Pot 0
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
VH0/RH0
VL0/RL0
VW0/RW0
Pot 1
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot1
VW1/RW1
VH1/RH1
VL1/RL1
REV 1.1 10/6/00
www.xicor.com
Characteristics subject to change without notice. 1 of 21

X9410 Datasheet
X9410
PIN DESCRIPTIONS
Host Interface Pins
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked out
by the falling edge of the serial clock.
Serial Input
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
Serial Clock (SCK)
The SCK input is used to clock data into and out of the
X9410.
Chip Select (CS)
When CS is HIGH, the X9410 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9410, placing it in
the active power mode. It should be noted that after a
power-up, a HIGH to LOW transition on CS is required
prior to the start of any operation.
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must be
brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
Device Address (A0A1)
The address inputs are used to set the least significant
2 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with
the X9410. A maximum of 4 devices may occupy the
SPI serial bus.
Potentiometer Pins
VH/RH (VH0/RH0—VH1/RH1), VL/RL (VL0/RL0—VL1/RL1)
The VH/RH and VL/RL inputs are equivalent to the terminal
connections on either end of a mechanical potentiometer.
VW/RW (VW0/RW0—VW1/RW1)
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when LOW prevents nonvolatile writes to
the Data Registers.
Analog Supplies (V+, V-)
The analog supplies V+, V- are the supply voltages for
the XDCP analog section.
PIN CONFIGURATION
VCC
VL0/RL0
VH0/RH0
VW0/RW0
CS
WP
SI
A1
VL1/RL1
VH1/RH1
VW1/RW1
VSS
DIP/SOIC
1 24
2 23
3 22
4 21
5 20
6 19
X9410
7 18
8 17
9 16
10 15
11 14
12 13
V+
NC
NC
NC
A0
SO
HOLD
SCK
NC
NC
NC
V-
SI
A1
VL1/RL1
VH1/RH1
VW1/RW1
VSS
NC
NC
NC
V-
SCK
HOLD
TSSOP
1 24
2 23
3 22
4 21
5 20
6 19
X9410
7 18
8 17
9 16
10 15
11 14
12 13
WP
CS
VW0/RW0
VH0/RH0
VL0/RL0
VCC
NC
NC
NC
V+
A0
SO
REV 1.1 10/6/00
www.xicor.com
Characteristics subject to change without notice. 2 of 21


Features Datasheet pdf APPLICATION NOTES A V A I L A B L E AN99 • AN115 • AN120 • AN124 • AN13 3 • AN134 • AN135 Low Noise/Low Po wer/SPI Bus X9410 Dual Digitally Contr olled Potentiometer (XDCP™) FEATURES • Two potentiometers in one package SPI serial interface • Register or iented format —Direct read/write/tran sfer wiper positions —Store as many a s four positions per potentiometer • Power supplies —VCC = 2.7V to 5.5V V+ = 2.7V to 5.5V —V– = –2.7V to –5.5V • Low power CMOS —Standby current < 1µA • High reliability — Endurance–100,000 data changes per bi t per register —Register data retenti on–100 years • 8-bytes of nonvolati le EEPROM memory • 10KΩ resistor ar rays • Resolution: 64 taps each pot 24-lead TSSOP, 24-lead SOIC and 24-p in plastic DIP packages DESCRIPTION The X9410 integrates two digitally control led potentiometers (XDCP) on a monolith ic CMOS integrated microcircuit. The di gitally controlled potentiometer is implemented using 63 resistive elements in a series array. Between each element are tap po.
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