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XC167CI Dataheets PDF



Part Number XC167CI
Manufacturers Infineon Technologies AG
Logo Infineon Technologies AG
Description 16-Bit Single-Chip Microcontroller Preliminary
Datasheet XC167CI DatasheetXC167CI Datasheet (PDF)

Da ta S h ee t, V 1. 1, J un . 20 03 X C 1 67 C I 1 6 - B i t S i n g l e - C h i p M i c r o c o n t r o l le r P re l i m i n a r y M i c ro c o n t ro l l e rs N e v e r s t o p t h i n k i n g . Edition 2003-06 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany © Infineon Technologies AG 2003. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics..

  XC167CI   XC167CI


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Da ta S h ee t, V 1. 1, J un . 20 03 X C 1 67 C I 1 6 - B i t S i n g l e - C h i p M i c r o c o n t r o l le r P re l i m i n a r y M i c ro c o n t ro l l e rs N e v e r s t o p t h i n k i n g . Edition 2003-06 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany © Infineon Technologies AG 2003. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Da ta S h ee t, V 1. 1, J un . 20 03 X C 1 67 C I P re l i m i n a r y 1 6 - B i t S i n g l e - C h i p M i c r o c o n t r o l le r M i c ro c o n t ro l l e rs P N e v e r re s t o p li m t h i n k i n g . in ar y XC167 Preliminary Revision History: Previous Version: Page 1 16 16, 49 35 49 51 52 53ff 57 58 59 62 67 2003-06 2002-10 V1.0 V1.1 Subjects (major changes since last revision) AD conversion times updated Reference to internal pullup resistor removed RSTIN note added Sentence added about the RTC clock source. Digital supply voltage range for IO pads improved Note 2 added Note 3 changed Specification of Sleep and Power-down mode supply current improved Conversion time formulas improved Note 4 changed Converter timing example improved Note 1 added Table 19 changed Controller Area Network (CAN): License of Robert Bosch GmbH We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] Preliminary 16-Bit Single-Chip Microcontroller XC166 Family XC167 XC167 1 Summary of Features • High Performance 16-bit CPU with 5-Stage Pipeline – 25 ns Instruction Cycle Time at 40 MHz CPU Clock (Single-Cycle Execution) – 1-Cycle Multiplication (16 × 16 bit), Background Division (32 / 16 bit) in 21 Cycles – 1-Cycle Multiply-and-Accumulate (MAC) Instructions – Enhanced Boolean Bit Manipulation Facilities – Zero-Cycle Jump Execution – Additional Instructions to Support HLL and Operating Systems – Register-Based Design with Multiple Variable Register Banks – Fast Context Switching Support with Two Additional Local Register Banks – 16 Mbytes Total Linear Address Space for Code and Data – 1024 Bytes On-Chip Special Function Register Area (C166 Family Compatible) • 16-Priority-Level Interrupt System with 77 Sources, Sample-Rate down to 50 ns • 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC), 24-Bit Pointers Cover Total Address Space • Clock Generation via on-chip PLL (factors 1:0.15 …1:10), or via Prescaler (factors 1:1 …60:1) • On-Chip Memory Modules – 2 Kbytes On-Chip Dual-Port RAM (DPRAM) – 4 Kbytes On-Chip Data SRAM (DSRAM) – 2 Kbytes On-Chip Program/Data SRAM (PSRAM) – 128 Kbytes On-Chip Program Memory (Flash Memory) • On-Chip Peripheral Modules – 16-Channel A/D Converter with Programmable Resolution (10-bit or 8-bit) and Conversion Time (down to 2.55 µs or 2.15 µs) – Two 16-Channel General Purpose Capture/Compare Units (32 Input/Output Pins) – Capture/Compare Unit for flexible PWM Signal Generation (CAPCOM6) (3/6 Capture/Compare Channels and 1 Compare Channel) – Multi-Functional General Purpose Timer Unit with 5 Timers – Two Synchronous/Asynchronous Serial Channels (USARTs) – Two High-Speed-Synchronous Serial Channels – On-Chip TwinCAN Interface (Rev. 2.0B active) with 32 Message Objects (Full CAN/Basic CAN) on Two CAN Nodes, and Gateway Functionality – IIC Bus Interface (10-bit addressing, 400 kbit/s) with 3 Channels (multiplexed) – On-Chip Real Time Clock, Driven by Dedicated Oscillator • Idle, Sleep, and Power Down Modes.


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