X24128 Datasheet (data sheet) PDF





X24128 Datasheet, 400KHz 2-Wire Serial E2PROM with Block Lock

X24128   X24128  

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128K X24128 400KHz 2-Wire Serial E2PROM with Block LockTM DESCRIPTION 16K x 8 Bit FEATURES • • • • • • • • • • • • • Save C ritical Data with Programmable Block Lo ck Protection —Block Lock (0, 1/4, 1/ 2, or all of E2PROM Array) —Software Write Protection —Programmable Hardwa re Write Protect In Circuit Programmabl e ROM Mode 400KHz 2-Wire Serial Interfa ce —Schmitt Trigger Input Noise Suppr ession —Output Slope Control for Grou nd Bounce Noise Elimination Longer Batt ery Life With Lower Power —Active Rea d Current Less Than 1mA —Active Write Current Less Than 3mA —Standby Curre nt Less Than 1µA 1.8V to 3.6V, 2.5V to 5.5V and 4.5V to 5.5V Power

X24128 Datasheet, 400KHz 2-Wire Serial E2PROM with Block Lock

X24128   X24128  
Supply Versions 32 Word Page Write Mode —Minimizes Total Write Time Per Word Internally Organized 16K x 8 Bidirectio nal Data Transfer Protocol Self-Timed W rite Cycle —Typical Write Cycle Time of 5ms High Reliability —Endurance: 1 00,000 Cycles —Data Retention: 100 Ye ars 14-Lead SOIC 16-Lead SOIC 8-Lead PD IP The X24128 is a CMOS Serial E2PROM, internally organized 16K x 8. The devi ce features a serial interface and soft ware protocol allowing operation on a s imple two wire bus. Three device select inputs (S0–S2) allow up to eight dev ices to share a common two wire bus. A Write Protect Register at the highest a ddress location, FFFFh, provides three write protection features: Software Wri te Protect, Block Lock Protect, and Pro grammable Hardware Write Protect. The S oftware Write Protect feature prevents any nonvolatile writes to the device un til the WEL bit in the Write Protect Re gister is set. The Block Lock Protectio n feature gives the user four array blo ck protect options, set by programming two bits in the Write Protect Register. The Programmable Hardware Write Protec t feature allows the user to install th e device with WP tied to VCC, write to and Block Lock the desired portions of the memory array in circuit, and then e nable the In Circuit Programmable ROM Mode by programming the








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