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X24320 Dataheets PDF



Part Number X24320
Manufacturers Xicor
Logo Xicor
Description 400KHz 2-Wire Serial E2PROM with Block Lock
Datasheet X24320 DatasheetX24320 Datasheet (PDF)

32K X24320 400KHz 2-Wire Serial E2PROM with Block LockTM DESCRIPTION 4K x 8 Bit FEATURES • • • • • • • • • • • • • Save Critical Data with Programmable Block Lock Protection —Block Lock (0, 1/4, 1/2, or all of E2PROM Array) —Software Write Protection —Programmable Hardware Write Protect In Circuit Programmable ROM Mode 400KHz 2-Wire Serial Interface —Schmitt Trigger Input Noise Suppression —Output Slope Control for Ground Bounce Noise Elimination Longer Battery Life With Lower Power —Act.

  X24320   X24320


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32K X24320 400KHz 2-Wire Serial E2PROM with Block LockTM DESCRIPTION 4K x 8 Bit FEATURES • • • • • • • • • • • • • Save Critical Data with Programmable Block Lock Protection —Block Lock (0, 1/4, 1/2, or all of E2PROM Array) —Software Write Protection —Programmable Hardware Write Protect In Circuit Programmable ROM Mode 400KHz 2-Wire Serial Interface —Schmitt Trigger Input Noise Suppression —Output Slope Control for Ground Bounce Noise Elimination Longer Battery Life With Lower Power —Active Read Current Less Than 1mA —Active Write Current Less Than 3mA —Standby Current Less Than 1µA 1.8V to 3.6V, 2.5V to 5.5V and 4.5V to 5.5V Power Supply Versions 32 Word Page Write Mode —Minimizes Total Write Time Per Word Internally Organized 4K x 8 Bidirectional Data Transfer Protocol Self-Timed Write Cycle —Typical Write Cycle Time of 5ms High Reliability —Endurance: 100,000 Cycles —Data Retention: 100 Years 8-Lead SOIC 14-Lead TSSOP 8-Lead PDIP The X24320 is a CMOS Serial E2PROM, internally organized 4K x 8. The device features a serial interface and software protocol allowing operation on a simple two wire bus. The bus operates at 400 KHz all the way down to 1.8V. Three device select inputs (S0–S2) allow up to eight devices to share a common two wire bus. A Write Protect Register at the highest address location, FFFFh, provides three write protection features: Software Write Protect, Block Lock Protect, and Programmable Hardware Write Protect. The Software Write Protect feature prevents any nonvolatile writes to the device until the WEL bit in the Write Protect Register is set. The Block Lock Protection feature gives the user four array block protect options, set by programming two bits in the Write Protect Register. The Programmable Hardware Write Protect feature allows the user to install the device with WP tied to VCC, write to and Block Lock the desired portions of the memory array in circuit, and then enable the In Circuit Programmable ROM Mode by programming the WPEN bit HIGH in the Write Protect Register. After this, the Block Locked portions of the array, including the Write Protect Register itself, are permanently protected from being erased. FUNCTIONAL DIAGRAM SERIAL E2PROM DATA AND ADDRESS (SDA) DATA REGISTER Y DECODE LOGIC COMMAND DECODE AND CONTROL LOGIC BLOCK LOCK AND WRITE PROTECT CONTROL LOGIC S2 S1 S0 DEVICE SELECT LOGIC WRITE PROTECT REGISTER 2K x 8 SERIAL E2PROM ARRAY 4K x 8 1K x 8 SCL PAGE DECODE LOGIC 1K x 8 WP WRITE VOLTAGE CONTROL 7035 FM 01 ©Xicor, 1995, 1996 Patents Pending 7035-1.2 4/25/97 T0/C2/D0 SH 1 Characteristics subject to change without notice X24320 Xicor E2PROMs are designed and tested for applications requiring extended endurance. Inherent data retention is greater than 100 years. PIN DESCRIPTIONS Serial Clock (SCL) The SCL input is used to clock all data into and out of the device. Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It is an open drain output and may be wire-ORed with any number of open drain or open collector outputs. An open drain output requires the use of a pull-up resistor. For selecting typical values, refer to the Pullup resistor selection graph at the end of this data sheet. Device Select (S0, S1, S2) The device select inputs (S0, S1, S2) are used to set the first three bits of the 8-bit slave address. This allows up to eight devices to share a common bus. These inputs can be static or actively driven. If used statically they must be tied to VSS or VCC as appropriate. If actively driven, they must be driven with CMOS levels (driven to VCC or VSS). Write Protect (WP) The Write Protect input controls the Hardware Write Protect feature. When held LOW, Hardware Write Protection is disabled. When this input is held HIGH, and the WPEN bit in the Write Protect Register is set HIGH, the Write Protect Register is protected, preventing changes to the Block Lock Protection and WPEN bits. * .197” S0 S1 S2 VSS PIN NAMES Symbol S0, S1, S2 SDA SCL WP VSS VCC NC Description Device Select Inputs Serial Data Serial Clock Write Protect Ground Supply Voltage No Connect 7035 FM T01 PIN CONFIGURATION Not to scale 8-Lead DIP/SOIC 1 2 3 4 * .244” 14-Lead TSSOP S0 S1 NC .200” NC NC S2 VSS 1 2 3 4 5 6 7 .252” 14 13 12 X24320 11 10 9 8 VCC WP NC NC NC SCL SDA X24320 8 7 6 5 VCC WP SCL SDA * SOIC Measurement 7035 FM 02 2 X24320 DEVICE OPERATION The device supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver. The device controlling the transfer is a master and the device being controlled is the slave. The master will always initiate data transfers, and provide the clock for both transmit and receive operations. Therefore, the device will be considered a slave in all applications. Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are res.


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