X24640 Datasheet (data sheet) PDF





X24640 Datasheet, 400KHz 2-Wire Serial E 2 PROM with Block Lock

X24640   X24640  

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64K X24640 400KHz 2-Wire Serial E2PROM with Block LockTM DESCRIPTION 8K x 8 B it FEATURES • • • • • • • • • • • • Save Cri tical Data with Programmable Block Lock Protection —Block Lock (0, 1/4, 1/2, or all of E2PROM Array) —Software Pr ogram Protection —Programmable Hardwa re Write Protect In Circuit Programmabl e ROM Mode 400KHz 2-Wire Serial Interfa c —Schmitt Trigger Input Noise Suppre ssion —Output Slope Control for Groun d Bounce Noise Elimination Longer Batte ry Life With Lower Power —Active Read Current Less Than 1mA —Active Progra m Current Less Than 3mA —Standby Curr ent Less Than 1µA 1.8V to 3.6V, 2.5V to 5.5V and 4.5V to 5.5V Power

X24640 Datasheet, 400KHz 2-Wire Serial E 2 PROM with Block Lock

X24640   X24640  
Supply Versions 32 Word Page Write Mode —Minimizes Total Write Time Per Word Internally Organized 8K x 8 Bidirectio nal Data Transfer Protocol Self-Timed W rite Cycle —Typical Write Cycle Time of 5ms High Reliability —Endurance: 1 00,000 Cycles —Data Retention: 100 Ye ars 8-Lead SOIC 20-Lead TSSOP 8-Lead PD IP The X24640 is a CMOS Serial E2PROM, internally organized 8K x 8. The devic e features a serial interface and softw are protocol allowing operation on a si mple two wire bus. The bus operates at 400 KHz all the way down to 1.8V. Three device select inputs (S0–S2) allow u p to eight devices to share a common tw o wire bus. A Write Protect Register at the highest address location, FFFFh, p rovides three write protection features : Software Write Protect, Block Lock Pr otect, and Programmable Hardware Write Protect. The Software Write Protect fea ture prevents any nonvolatile writes to the device until the WEL bit in the Wr ite Protect Register is set. The Block Lock Protection feature gives the user four array block protect options, set b y programming two bits in the Write Pro tect Register. The Programmable Hardwar e Write Protect feature allows the user to install the device with WP tied to VCC, program and Block Lock the desired portions of the memory array in circuit, and then enable the








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