SPI Serial E 2 PROM with Block Lock TM Protection
APPLICATION NOTE
A VA I L A B L E
AN61
128K
X25128
SPI Serial E2PROM with Block LockTM Protection
DESCRIPTION
16K x 8...
Description
APPLICATION NOTE
A VA I L A B L E
AN61
128K
X25128
SPI Serial E2PROM with Block LockTM Protection
DESCRIPTION
16K x 8 Bit
FEATURES
2MHz Clock Rate SPI Modes (0,0 & 1,1) 16K X 8 Bits —32 Byte Page Mode Low Power CMOS —<1µ A Standby Current —<5mA Active Current 2.7V To 5.5V Power Supply Block Lock Protection —Protect 1/4, 1/2 or all of E2PROM Array Built-in Inadvertent Write Protection —Power-Up/Power-Down protection circuitry —Write Enable Latch —Write Protect Pin Self-Timed Write Cycle —5ms Write Cycle Time (Typical) High Reliability —Endurance: 100,000 cycles —Data Retention: 100 Years —ESD protection: 2000V on all pins 14-Lead SOIC Package 16-Lead SOIC Package 8-Lead PDIP Package FUNCTIONAL DIAGRAM
STATUS REGISTER WRITE PROTECT LOGIC
The X25128 is a CMOS 131,072-bit serial E2PROM, internally organized as 16K x 8. The X25128 features a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple three-wire bus. The bus signals are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a chip select (CS) input, allowing any number of devices to share the same bus. The X25128 also features two additional inputs that provide the end user with added flexibility. By asserting the HOLD input, the X25128 will ignore transitions on its inputs, thus allowing the host to service higher priority interrupts. The WP input can be used as a hardwire input to the X25128 disa...
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