Supervisor. X4003 Datasheet

X4003 Datasheet PDF


Part

X4003

Description

CPU Supervisor

Manufacture

Xicor

Page 18 Pages
Datasheet
Download X4003 Datasheet


X4003 Datasheet
X4003/X4005
CPU Supervisor
FEATURES
• Selectable watchdog timer
—Select 200ms, 600ms, 1.4s, off
• Low VCC detection and reset assertion
—Five standard reset threshold voltages
nominal 4.62V, 4.38V, 2.92V, 2.68V, 1.75V
—Adjust low VCC reset threshold voltage using
special programming sequence
—Reset signal valid to VCC = 1V
• Low power CMOS
—12µA typical standby current, watchdog on
—800nA typical standby current watchdog off
—3mA active current
• 400kHz I2C interface
• 1.8V to 5.5V power supply operation
• Available packages
—8-lead SOIC
—8-lead MSOP
BLOCK DIAGRAM
DESCRIPTION
These devices combine three popular functions, Power-
on Reset Control, Watchdog Timer, and Supply Voltage
Supervision. This combination lowers system cost,
reduces board space requirements, and increases
reliability.
Applying power to the device activates the power on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent
protection mechanism for microcontrollers. When the
microcontroller fails to restart a timer within a select-
able time out interval, the device activates the RESET/
RESET signal. The user selects the interval from three
preset values. Once selected, the interval does not
change, even after cycling the power.
The device’s low VCC detection circuitry protects the
user’s system from low voltage conditions, resetting the
system when VCC falls below the minimum VCC trip
point. RESET/RESET is asserted until VCC returns to
proper operating level and stabilizes. Five industry stan-
dard VTRIP thresholds are available; however, Xicor’s
unique circuits allow the threshold to be reprogrammed
to meet custom requirements, or to fine-tune the thresh-
old for applications requiring higher precision.
WP
SDA
SCL
VCC
Watchdog Transition
Detector
Data
Register
Command
Decode &
Control
Logic
VCC Threshold
Reset logic
Control
Register
VTRIP
+
-
Watchdog
Timer Reset
Reset &
Watchdog
Timebase
Power on and
Low Voltage
Reset
Generation
RESET (X4003)
RESET (X4005)
REV 1.1.3 4/30/02
www.xicor.com
Characteristics subject to change without notice. 1 of 18

X4003 Datasheet
X4003/X4005
PIN CONFIGURATION
8-Pin JEDEC SOIC, MSOP
NC
NC
RESET
VSS
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
PIN DESCRIPTION
Pin
(SOIC/DIP)
1
2
3
Pin
TSSOP
3
4
5
46
57
68
71
82
Pin
(MSOP)
2
3
4
5
6
1
Name
NC
NC
RESET/
RESET
VSS
SDA
SCL
WP
VCC
Function
No internal connections
No internal connections
Reset Output. RESET/RESET is an active LOW/HIGH, open
drain output which goes active whenever VCC falls below the
minimum VCC sense level. It will remain active until VCC rises
above the minimum VCC sense level for 250ms. RESET/
RESET goes active if the watchdog timer is enabled and SDA
remains either HIGH or LOW longer than the selectable
Watchdog time out period. A falling edge of SDA, while SCL
also toggles from HIGH to LOW followed by a stop condition
resets the watchdog timer. RESET/RESET goes active on
power up and remains active for 250ms after the power supply
stabilizes.
Ground
Serial Data. SDA is a bidirectional pin used to transfer data
into and out of the device. It has an open drain output and may
be wire ORed with other open drain or open collector outputs.
This pin requires a pull up resistor and the input buffer is
always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA while
SCL also toggles from HIGH to LOW follow by a stop condition
resets the watchdog timer. The absence of this procedure with-
in the watchdog time out period results in RESET/RESET going
active.
Serial Clock. The serial clock controls the serial bus timing for
data input and output.
Write Protect. WP HIGH prevents changes to the watchdog timer
setting.
Supply voltage
REV 1.1.3 4/30/02
www.xicor.com
Characteristics subject to change without notice. 2 of 18


Features Datasheet pdf X4003/X4005 CPU Supervisor FEATURES • Selectable watchdog timer —Select 200 ms, 600ms, 1.4s, off • Low VCC detect ion and reset assertion —Five standar d reset threshold voltages nominal 4.62 V, 4.38V, 2.92V, 2.68V, 1.75V —Adjust low VCC reset threshold voltage using special programming sequence —Reset s ignal valid to VCC = 1V • Low power C MOS —12µA typical standby current, w atchdog on —800nA typical standby cur rent watchdog off —3mA active current • 400kHz I2C interface • 1.8V to 5 .5V power supply operation • Availabl e packages —8-lead SOIC —8-lead MSO P DESCRIPTION These devices combine thr ee popular functions, Poweron Reset Con trol, Watchdog Timer, and Supply Voltag e Supervision. This combination lowers system cost, reduces board space requir ements, and increases reliability. Appl ying power to the device activates the power on reset circuit which holds RESE T/RESET active for a period of time. Th is allows the power supply and oscillator to stabilize before the processor can execute code. .
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