X76F100 Data Sheet PDF | Xicor





(Datasheet) X76F100 data sheet PDF

Part Number X76F100
Description 1K 128 x 8 Bit
Manufacture Xicor
Total Page 17 Pages
PDF Download Download X76F100 Datasheet PDF

Features: 1K X76F100 Secure SerialFlash 128 x 8 Bit FEATURES • 64-bit password secur ity • One array (112-bytes) two passw ords (16-bytes) —Read password —Wri te password • Programmable passwords • Retry counter register —Allows 8 tries before clearing of the array • 32-bit response to reset (rst input) 8-byte sector Write Mode • 1MHz clo ck rate • 2-wire serial interface • Low power CMOS —3.0 to 5.5V operatio n —Standby current less than 1µA — Active current less than 3 mA • High reliability endurance: —100,000 write cycles • Data retention: 100 years Available in: —8-lead PDIP, SOIC, MSOP, and smart car module DESCRIPTION The X76F100 is a Password Access Secur ity Supervisor, containing one 896-bit Secure SerialFlash array. Access to the memory array can be controlled by two 64-bit passwords. These passwords prote ct read and write operations of the mem ory array. The X76F100 features a seria l interface and software protocol allowing operation on a popular two wire bus. The bus signals are a cl.

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X76F100 datasheet
1K
X76F100
128 x 8 Bit
Secure SerialFlash
FEATURES
• 64-bit password security
• One array (112-bytes) two passwords (16-bytes)
—Read password
—Write password
• Programmable passwords
• Retry counter register
—Allows 8 tries before clearing of the array
• 32-bit response to reset (rst input)
• 8-byte sector Write Mode
• 1MHz clock rate
• 2-wire serial interface
• Low power CMOS
—3.0 to 5.5V operation
—Standby current less than 1µA
—Active current less than 3 mA
• High reliability endurance:
—100,000 write cycles
• Data retention: 100 years
• Available in:
—8-lead PDIP, SOIC, MSOP, and smart car module
DESCRIPTION
The X76F100 is a Password Access Security Supervi-
sor, containing one 896-bit Secure SerialFlash array.
Access to the memory array can be controlled by two
64-bit passwords. These passwords protect read and
write operations of the memory array.
The X76F100 features a serial interface and software
protocol allowing operation on a popular two wire bus.
The bus signals are a clock Input (SCL) and a bidirec-
tional data input and output (SDA). Access to the
device is controlled through a chip select (CS) input,
allowing any number of devices to share the same bus.
The X76F100 also features a synchronous response
to reset providing an automatic output of a hard-wired
32-bit data stream conforming to the industry standard
for memory cards.
The X76F100 utilizes Xicor’s proprietary Direct Write
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
BLOCK DIAGRAM
CS
SCL
SDA
Interface
Logic
RST
Chip Enable
Data Transfer
Array Access
Enable
Password Array
and Password
Verification Logic
Reset
Response Register
8K Byte
SerialFlash Array
Array 0
(Password Protected)
32 Byte
SerialFlash Array
Array 1
(Password Protected)
Retry Counter
REV 1.0 6/22/00
www.xicor.com
Characteristics subject to change without notice. 1 of 16

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