V53C806H

MOSEL VITELIC V53C806H HIGH PERFORMANCE 1M x 8 BIT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY HIGH PERFORMANCE Max. RAS Access Time, (tRAC) Max. Column Address Access Time, (tCAA) Min. Fast Page Mode Cycle Time, (tPC) Min. Read/Write Cycle Time, (tRC) 40 40 ns 20 ns 23 ns 75 ns 45 45 ns 22 ns 25 ns 80 ns 50 50 ns 24 ns 28 ns 90 ns 60 60 ns 30 ns 40 ns 120 ns Features s 1M x 8-bit organization s Fast Page Mode for a sustained data rate of 43 MHz s RAS access time: 40, 45, 50, 60 ns s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh capability s Refresh Interval: 1024 cycle/16 ms s Available in 28-pin 400 mil SOJ package s Single +5V ±10% Power Supply s TTL Interface Description The V53C806H is a ultra high speed 1,048,576 x 8 bit CMOS dynamic random access memory. The V53C806H offers a combination of features: Fast Page Mode for high data bandwidth, and Low CMOS standby current. All inputs and outputs are TTL compatible. Input and output capacitances are significantly lowered to allow increased system performance. Fast Page Mode operation allows random access of up to 1024 x 8 bits within a row with cycle times as fast as 23 ns. Because of static circuitry, the CAS clock is not in the critical timing path. The flow-through column address latches allow address pipelining while relaxing many critical system timing requirements. The V53C806H is ideally suited for graphics, digital signal processing and high-performance computing systems. Device Usage Chart O...