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UPD705100 Dataheets PDF



Part Number UPD705100
Manufacturers NEC
Logo NEC
Description V830TM 32-BIT MICROCONTROLLER
Datasheet UPD705100 DatasheetUPD705100 Datasheet (PDF)

DATA SHEET MOS INTEGRATED CIRCUIT µPD705100 V830TM 32-BIT MICROCONTROLLER The µPD705100 (also called V830) is a microcontroller for incorporation use, which belongs to the V830 familyTM of the NEC original V800 seriesTM microcontrollers. The V830 can achieve high cost-performance for multimedia equipment, by integrating quick real-time responses, high-speed arithmetic/logical instructions, and functions suitable for individual applications. The following user’s manual describes details of th.

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DATA SHEET MOS INTEGRATED CIRCUIT µPD705100 V830TM 32-BIT MICROCONTROLLER The µPD705100 (also called V830) is a microcontroller for incorporation use, which belongs to the V830 familyTM of the NEC original V800 seriesTM microcontrollers. The V830 can achieve high cost-performance for multimedia equipment, by integrating quick real-time responses, high-speed arithmetic/logical instructions, and functions suitable for individual applications. The following user’s manual describes details of the functions of the V830. Be sure to read it before designing an application system. V830 User’s Manual, Hardware : U10064E V830 User’s Manual, Architecture : U12496E FEATURES • High-performance 32-bit architecture for incorporation use • Built-in cache memory Instruction cache : 4K bytes Data cache • Built-in RAM Instruction RAM Data RAM : 4K bytes : 4K bytes : 4K bytes • 16-bit bus fixing function • 16-bit bus system construction • Instructions suitable for variable application • Sum-of-products operation • Saturable operation • Branch prediction • Concatenation shift • Block transfer instructions • One-clock-pitch pipeline structure • 16-/32-bit instructions • Separate buses for addresses and data • 4G-byte linear addresses • Thirty-two 32-bit general-purpose registers • Hardware-interlocked register/flag hazard • 16-level interrupt responses • • Maximum operating frequency Power-saving mode • 100 MHz (internal) • 50/33 MHz (external) • CMOS operation, 3.3-V operation ORDERING INFORMATION Part number Package 144-pin plastic LQFP (fine pitch) (20 × 20 mm) µPD705100GJ-100-8EU The information in this document is subject to change without notice. Document No. U11483EJ3V0DS00 (3rd edition) Date Published January 1998 J CP(K) Printed in Japan The mark shows major revised points. © 1995, 1996 µPD705100 PIN CONFIGURATION 144-pin plastic LQFP (fine pitch) (20 × 20 mm) µPD705100GJ-100-8EU GND GND IC1 IC2 RESET IC2 IC2 IC2 GND VDD VDD GND INTV3 INTV2 INTV1 INTV0 INT IC1 GND VDD IC1 ST3 ST2 ST1 ST0 R/W VDD GND A31/CS3 A30/CS2 A29/CS1 A28/CS0 A5 A4 GND GND VDD VDD GND BCLK CMODE IC3 NMI VDD VDD GND A27 A26 A25 A24 A23 A22 GND GND VDD VDD A21 A20 A19 A18 A17 A16 GND VDD A15 A14 A13 A12 A11 A10 VDD VDD 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 VDD A3 A2 A1/BE3 BH/BE2 BE1 BE0 VDD VDD GND BCYST READY HLDRQ HLDAK D0 D16 VDD VDD GND GND D1 D17 D2 D18 D3 D19 GND VDD D4 D20 D5 D21 D6 D22 VDD VDD Caution Leave the IC1 pins open. Connect each IC2 pin to GND via a dedicated resistor. Connect each IC3 pin to VDD via a dedicated resistor. 2 GND GND A9 A8 A7 A6 SIZ16B ASEL GND VDD D31 D15 D30 D14 D29 D13 GND GND VDD VDD D28 D12 D27 D11 D.


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