Document
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD7225
PROGRAMMABLE LCD CONTROLLER/DRIVER
The µPD7225 is a software-programmable LCD (Liquid Crystal Display) controller/driver. The µPD7225 can be serially interfaced with the CPU in a microcomputer and can directly drive 2, 3, or 4-time division LCD. The µPD7225 contains a segment decoder which can generate specific segment patterns. In addition, the µPD7225 can be used to control on/off (blinking) operation of a display.
FEATURES
• Can directly drive LCD • Programmable time-division multiplexing
• •
Static drive Divide-by-2, 3, or -4 time division multiplexing 7-segment Divide-by-4 Divide-by-3 Divide-by-2 time division ............... 16 digits time division ............... 10 2/3 digits time division ............... 8 digits
• Number of digits displayed
•
Static................................................. 4 digits
•
14-segment Divide-by-4 time division ............... 8 digits
• Bias method Static, 1/2, 1/3 • Segment decoder output
• •
7-segment : Numeric characters 0 to 9, six symbols 14-segment : 36 alphanumeric characters, 13 symbols
• Blinking operation • Multi-chip configuration possible • 8-bit serials interface 75X series and 78K series compatible • CMOS • Single power supply
ORDERING INFORMATION
Part Number Package 52-pin plastic QFP (14 × 14 mm) 52-pin plastic QFP (straight) ( 56-pin plastic QFP (10 × 10 mm) 52-pin plastic QFP (14 × 14 mm) 14 mm)
µPD7225G00 µPD7225G01 µPD7225GB-3B7 µPD7225GC-AB6
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
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Document No. S14308EJ6V0DS00 (6th edition) (O.D. No. IC-1555) Date Published June 1999 N CP (K) Printed in Japan
The mark
shows major revised points.
©
1986, 1999
µPD7225
PIN CONFIGURATION: (Top View)
µPD7225G00 µPD7225G01 µPD7225GC-AB6
52-pin plastic QFP (14 × 14 mm) 52-pin plastic QFP (straight) ( 14 mm) 52-pin plastic QFP (14 × 14 mm)
CL1 S31 S30 S29 S28 S27 S26 S25 S24 S23 S22 S21 S20 40 39 38 37 36 35 34 33 32 31 30 29 28 15 16 17 18 19 20 21 22 23 24 25 27 26
52 CL2 /SYNC VLC1 VLC2 VLC3 VSS VDD /SCK SI /CS /BUSY C, /D /RESET 1 2 3 4 5 6 7 8 9 10 11 12 13 14
51 50
49
48
47
46
45
44 43
42 41
S19 S18 S17 S16 S15 S14 VDD S13 S12 S11 S10 S9 S8
NC
COM0
COM1
COM2
COM3
S0
S1
S2
S3
S4
S5
S6
SI /SCK C, /D /CS /BUSY SYNC S0-S31 NC Remark
: Serial Input : Serial Clock : Command/Data : Chip Select : Busy : Sync : Segment : Non-connection /××× indicates active low signal.
CL1 CL2 RESET VDD VSS IC
: External Resistor 1 (External Clock) : External Resistor 2 : Reset : Power Supply : Ground : Internally Connected
VLC1-VLC3 : Power Supply For LCD Drive
COM0-COM3 : Common
2
Data Sheet S14308EJ6V0DS00
S7
µPD7225
µPD7225GB-3B7 56-pin plastic QFP (10 × 10 mm)
S19 S18 S17 S16 S15 S14 S13 S1.