Document
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD75328
4-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
The µPD75328 is one of the 75X Series 4-bit single-chip microcomputer, and has a data processing capability comparable to that of an 8-bit microcomputer. In addition to high-speed operation with 0.95 µ s minimum instruction execution time for the CPU, the
µPD75328 can also process data in 1-, 4-, and 8-bit units. Therefore, as a 4-bit single-chip microcomputer
chip having a built-in LCD controller/driver and A/D converter, its data processing capability is the highest in its class in the world. The µPD75P328 with one-time PROM, which is replaced with the internal mask ROM for a µPD75328, is applicable for evaluating systems under development, or for small-scale production of developed systems. "Detailed functions are described in the following user's manual. Be sure to read it for designing."
" µ PD75328 User's Manual: IEM-5045"
FEATURES
• Capable of high-speed operation and variable instruction execution time to power save • 0.95 µ s, 1.91 µ s, 15.3 µ s (Main system clock: operating at 4.19 MHz) • 122 µs (Subsystem clock: operating at 32.768 kHz) • 75X architecture comparable to that for an 8-bit microcomputer is employed • Built-in programmable LCD controller/driver • Built-in 8-bit resolution A/D converter: 6 channels • Clock operation at reduced power dissipation: 5 µA TYP. (operating at 3 V) • Timer function: 3 channels • Interrupt functions especially enhanced for applications, such as remote control receiver • Pull-up resistors can be provided for 35 I/O lines • Built-in NEC standard serial bus interface (SBI)
APPLICATIONS
Cameras, blood pressure gauges, airconditioners, etc.
ORDERING INFORMATION
Part Number Package 80-pin plastic QFP (s 14mm) Quality Grade Standard
µPD75328GC-xxx-3B9
Remarks: xxx is ROM code number.
Please refer to “Quality Grade on NEC Semiconductor Devices” (Document Number IEI-1209) published by NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
The information in this document is subject to change without notice.
Document No. IC-2763B (O. D. No. IC-7628D) Date Published November 1993 P Printed in Japan
The mark 5 shows the major revised points.
© NEC Corporation 1990
µPD75328
FUNCTIONAL OUTLINE (1/2)
Item Number of Basic Instructions Instruction Execution Time Internal Memory ROM RAM 41
Function
0.95, 1.91, and 15.3 µs, (Main system clock: operating at 4.19 MHz) 122 µs (Subsystem clock: operating at 32.768 kHz) 8064 × 8-bit 512 × 4-bit 4-bit manipulation: 8 ×4 banks, 8-bit manipulation: 4×4 banks 8 44 20 8 8 CMOS Input pins CMOS input/output pins CMOS output pins N-ch open-drain input/output Internal pull-up resistor specification by software is possible (except P00). Also serve as segment pins Withstand voltage: 10V Internal pull-up resistor specification by mask option is possible.
General-Purpose Registers I/O Line Including the pins which also serve as LCD drive pins. Excluding the pins which is specifically provided for driving LCD. LCD Controller/ Driver
• LCD drive output pins • Segment output pins: 20 (CMOS output pins: 8) • Common output pins: 4 • Capable of driving up to 20 × 4 segments • Display output mode: Static, 1/2, 1/3, 1/4 duty 8-bit resolution x 6 channels (successive approximation type) • Operating voltage VDD = 3.5 to 6.0 V • A/D conversion speed 40.1 µs (operating at 4.19 MHz) 8-bit timer/event counter • Clock source: 4 steps • Event count is possible
A/D Converter
Timer MHz)
3 chs
8-bit basic interval timer • Reference time generation (1.95, 7.82, 31.3, 250 ms: operating at 4.19 • Can be used as watchdog timer Clock timer • 0.5 second interval generation • Count clock source slectable (4.19 MHz/32.768 kHz) • Clock advance mode (3.9 ms time interval generation) • Buzzer output (2 kHz)
Serial Interface Bit Sequential Buffer Clock Output (PCL) Buzzer Output (BUZ) Vector Interrupt Test Input
Clock • • •
synchronized serial interface Internal NEC standard serial bus interface (SBI mode) 3-line serial I/O mode ... MSB/LSB first selectable 2-line serial I/O mode
Special bit manipulation memory: 16 bits Φ, 524, 262, 65.5 kHz (Main system clock: 4.19 MHz) 2 kHz (with main system clock or subsystem clock operated) • External: 3 • Internal: 3 • External: 1 • Internal: 1
2
µPD75328
FUNCTIONAL OUTLINE (2/2)
Item System Clock Generator Standby Operating Temperature Range Operating Supply Voltage Package
Function • Main system clock generation ceramic/crystal oscillator; 4.194304 MHz • Subsystem clock generation crysal oscillator: 32.768 kHz STOP/HALT mode –40 to +85°C VDD = 2.7 to 6.0 V 80-pin plastic QFP (s 14 mm)
3
µPD75328
CONTENTS 1. 2. 3. PIN CONFIGURATION (TOP VIEW) ........................................................................................ 6 BLOCK DIAGRAM ......................................................................................................................7 PIN .