Document
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD78001B(A), 78002B(A)
8-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
The µPD78001B(A)/78002B(A) are products in the µPD78002 subseries within the 78K/0 series. The µPD78001B(A)/78002B(A) have various peripheral hardware such as timer, serial interface and interrupt function. A one-time PROM or EPROM product, the µPD78P014, capable of operating in the same power supply voltage range as that of the mask ROM product and other development tools is provided. Functions are described in detail in the following User's Manual, which should be read when carrying out design work. µPD78002, 78002Y Series User's Manual: IEU-1334
FEATURES
• The µPD78001B, in comparison with the 78002B, is a higher reliability device, as a result of a more comprehensive quality assurance program (Refer to Quality Grade on NEC Semiconductor Devices (IEI-1209)) • Large on-chip ROM & RAM
Item Product Name Program Memory (ROM) 8K bytes 16K byte Data Memory (Internal High-Speed RAM) 256 bytes 384 bytes • 64-pin plastic shrink DIP (750 mil) • 64-pin plastic QFP ( 14 mm) Package
µPD78001B(A) µPD78002B(A)
• External memory expansion space: 64K bytes • Instruction execution time can be varied from high-speed (0.4 µs) to ultra-low-speed (122 µs) • I/O ports: 53 (N-ch open-drain : 4) • Serial interface : 1 channel • Timer: 4 channels • Operating voltage range : 2.7 to 6.0 V
APPLICATION
Transmission equipment control device, gas detector circuit breaker, safety devices, etc.
The information in this document is subject to change without notice.
Document No. IC-3599 (O.D. No. IC-9078) Date Published February 1995 P Printed in Japan
©
1995
µPD78001B(A), 78002B(A)
ORDERING INFORMATION
Part Number Package 64-pin plastic shrink DIP (750 mil) 64-pin plastic QFP (s 14 mm) 64-pin plastic shrink DIP (750 mil) 64-pin plastic QFP (s 14 mm) Quality Grade Special Special Special Special
µPD78001BCW (A)-××× µPD78001BGC (A)-×××-AB8 µPD78002BCW (A)-××× µPD78002BGC (A)-×××-AB8
Remark ××× indicates ROM code No.
Please refer to "Quality grade on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
Difference between the µPD78001B(A), 78002B(A) and the µPD78001B, 78002B.
Product Name Item Quality Grade
µPD78001B(A), 78002B(A)
µPD78001B, 78002B
Special
Standard
2
µPD78001B(A), 78002B(A)
78K/0 SERIES PRODUCT DEVELOPMENT
These products are a further development in the 78K/0 Series. The designations appearing inside the boxes are subseries names.
Products in Volume Production Products under Development For control 100-pin 80-pin 64-pin 64-pin 64-pin 42/44-pin
2 Y series products are compatible with I C bus.
µ PD78078 µ PD78054 µ PD78018F µ PD78014 µ PD78002 µ PD78083
µ PD78078Y µ PD78054Y µPD78018FY µ PD78014Y µ PD78002Y
Timer added to the µ PD78054, external interface functions UART and D/A added to the µ PD78014, I/O enhanced Low-voltage (1.8 V) operation version of the µ PD78014, with enhanced ROM and RAM variations A/D and 16-bit timer added to the µ PD78002 Basic subseries for control Internal UART, low-voltage (1.8 V) operation possible
78K/0 Series For FIP® driving 100-pin µ PD780208 80-pin µPD78044A 64-pin µ PD78024 For LCD driving 100-pin I/O, FIP C/D of the µPD78044A enhanced, display output total: 53 6-bit U/D counter added to the µPD78024, display output total: 34 Basic subseries for FIP driving, display output total: 26
µ PD78064
For IEBus
TM
µ PD78064Y
Subseries for LCD driving, internal UART
80-pin
µ PD78098
IEBus controller added to the µPD78054
The major functional differences among the subseries are shown below.
Function Name For Control 8-bit 16-bit 1ch Timer A/D Watch 1ch Watchdog 1ch 8-bit × 8ch D/A VDD MIN. Value 1.8 V 2.0 V 1.8 V 2.7 V — — 2ch 1ch 1ch 1ch — 8-bit × 8ch 8-bit × 8ch — 1ch 1ch (UART: 1ch) 2ch 33 74 68 54 2ch 1ch 1ch 1ch 8-bit × 8ch 8-bit × 8ch — 2ch (UART: 1ch) 57 2.0 V — 1.8 V 2.7 V — —
Serial Interface
I/O
External Expansion
µPD78078 µPD78054 µPD78018F µPD78014 µPD78002 µPD78083
4ch 2ch
8-bit × 2ch 3ch (UART: 1ch)
88 69
C
—
2ch
53
For FIP ® driving
µPD780208 µPD78044A µPD78024
For LCD driving For IEBusTM
µPD78064 µPD78098
2ch
1ch
1ch
1ch
8-bit × 2ch 3ch (UART: 1ch)
69
2.7 V
C
3
µPD78001B(A), 78002B(A)
OVERVIEW OF FUNCTION
Product Name Item Internal memory ROM Internal highspeed RAM 64K bytes 8 bits × 32 registers (8 bits × 8 registers × 4 banks) On-chip instruction execution time cycle modification function 0.4 µs/0.8 µs/1.6 µs/3.2 µs/6.4 µs (at 10.0 MHz operation) 122 µs (at 32.768 kHz operation)
µPD78001B(A)
8K bytes 256 bytes
µPD78002B(A)
16K bytes 384 bytes
Memory space General registers Instruction cycle When main system clock selected When subsystem clock selected Instruction set
• 16-bit operation • Bit manipulation (set, reset, test, boolean operation) • BCD correction, etc. Total • CMOS input • CMOS I/O • N-chann.