Document
UTC UC3842A / 3843A LINEAR INTEGRATED CIRCUIT
CURRENT MODE PWM CONTROL CIRCUITS
DESCRIPTION
The UTC UC3842A/3843A provide the necessary functions to implement off-line or DC to DC fixed frequency current mode , controlled switching circuits with a minimal external part count
SOP-8
FEATURES
*Low external part count. *Low start up current ( Typical 0.12mA ) *Automatic feed forward compensation *Pulse-by-Pulse current limiting *Under-voltage lockout with hysteresis *Double pulse Suppression *High current totem pole output to drive MOSFET directly *Internally trimmed band gap reference *500kHz operation
DIP-8
BLOCK DIAGRAM
7
Vcc
Vref
8
Internal Bias 1/2Vref
5V REF
S/R
5 GND
Vref Good Logic 1/3Vref U.V.L.O CURRENT SENSE COMPARATOR R PWM LATCH S
7
Vcc
VFB COMP
2 1
ERROR AMPLIFIER
1V
6
OUTPUT
CURRENT SENSE 3
RT/CT
4
OSCILLATOR
5 GND
ABSOLUTE MAXIMUM RATINGS(Ta=25°C)
PARAMETER
Supply Voltage(Low Impedance Source) Supply Voltage(Icc<30mA) Output Current ( Peak ) Output Energy(capacity Load) Analog Inputs(pin 2,3) Error Amplifier Output Sink Current Power Dissipation Lead Temperature( Soldering 10 Sec )
SYMBOL
VCC Vcc Io VI(ANA) ISINK(EA) PD DIP-8 SOP-8 Tlead
VALUE
30 Self Limiting +-1 5 -0.3 ~ +6.3 10 at Tamb<=25°C 1.0 at Tamb<=25°C 0.5 300
UNIT
V V A µJ V mA W W °C
UTC
UNISONIC TECHNOLOGIES CO., LTD.
1
QW-R103-002,A
UTC UC3842A / 3843A LINEAR INTEGRATED CIRCUIT
(continued)
PARAMETRER
Storage Temperature Note 1: Ta>25°C, PD derated with 8mW/°C.
SYMBOL
Tstg
VALUE
-65 ~ +150
UNIT
°C
ELECTRICAL CHARACTERISTICS(0°C <=Ta<=70°C,VCC=15V,RT=10kΩ,CT=3.3nF,unless otherwise
specified)
PARAMETER Reference Section
Output Voltage Line Regulation Load Regulation Temperature Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit
SYMBOL
VREF ∆VREF ∆VREF
TEST CONDITIONS
Tj=25°C,Io=1mA 12<=VIN<=25V 1<=Io=20mA (Note 2) Line, Load, Temp(note 2) 10Hz<=f<=10kHz,Tj=25°C (note 2) Ta=25°C,1000Hrs(note 2)
MIN
4.9
TYP
5 6 6 0.2 50 5 -100 52 0.2 5 1.7 2.50 -0.3 90 1 70 6 -0.8 6 0.7 3 1 70 -2 150 0.1 1.5 13.5 13.5 50 50 16 8.4 10 7.6 97
MAX
5.1 20 25 0.4 5.18 25 -180 57 1
UNIT
V mV mV mV/°C V uV mV mA kHz % % V V µA dB MHz dB mA mA V V V/V V dB µA ns V V V V ns ns V V
4.82
Vosc ISC f ∆f/∆Vcc Vosc VI(EA) IBIAS
-30 47
Oscillator Section
Initial Accuracy Voltage Stability Temperature Stability Amplitude Tj=25°C 12<=Vcc<=25V Tmin<=TA<=Tmax(note 2) Vpin 4 peak to peak Vpin 1=2.5V 2 <=Vo<=4V Tj=25°C (note 2) I2<=Vcc<=25V Vpin 2=2.7V,Vpin 1=1.1V Vpin 2=2.3V,Vpin 1=5V Vpin 2=2.3V, RL=15kΩ to GND Vpin 2=2.7V,Vpin 1=1.1V (note 3,4) Vpin 1=5V( note 3) 12<=Vcc<=25V Vpin 3=0 to 2V VOL VOH tR tF VTH(ST) VOPR(min) Isink=20mA Isink=200mA Isource=20mA Isource=200mA Tj=25°C,CL=1nF(note 2) Tj=25°C,CL=1nF(note 2) UTC3842A UTC3843A After Turn On UTC3842A UTC3843A
Error Amplifier Section
Input Voltage Input Bias Current AVOL Unity Gain Bandwidth PSRR Output Sink Current Output Source Current Vout High Vout Low 2.42 60 0.7 60 2 -0.5 5 2.58 -2
Isink Isource VOH VOL GV VI(MAX) IBIAS
1.1 3.15 1.1 -10 300 0.4 2.2
Current Sense section
Gain Maximum Input signal PSRR Input Bias Current Delay to Output 2.85 0.9
Output Section
Output Low Level Output High Level Rise Time Fall Time Start Threshold Min. Operating Voltage 13 12
150 150 17.5 9 11.5 8.2 100
Under-Voltage Lockout Output Section
14.5 7.8 8.5 7 95
V %
PWM Section
Maximum Duty Cycle D(MAX)
UTC
UNISONIC TECHNOLOGIES CO., LTD.
2
QW-R103-002,A
UTC UC3842A / 3843A LINEAR INTEGRATED CIRCUIT
PARAMETER
Minimum Duty Cycle
SYMBOL
D(MIN)
TEST CONDITIONS
MIN
TYP
MAX
0
UNIT
%
Total Standby Current
Start-up Current IST Operating Supply Current ICC(opr) Vpin 2=Vpin 3=0V Vcc Zener Voltage Vz Icc=25mA note 2:These parameters, although guaranteed ,are not 100% tested in production. note 3:Parameters measured at trip point of latch with Vpin 2=0. note 4:Gain defined as: 0.12 11 34 0.3 17 mA mA V
A=
∆Vpin 1 ∆Vpin 3
; 0<=Vpin3<=0.8V
note 5:Adjust Vcc above the start threshold before setting at 15V.
OPEN-LOOP LABORATORY TEST FIXTURE
Vref 4.7kΩ RT 100kΩ
0.1 µF
Error Amp Adjust Isense Adjust 4.7kΩ
2 3
5kΩ
7 6 5
0.1 µF
1
8
A
Vcc
1kΩ / 1W OUTPUT
4
CT
High peak current associated with capacity loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to pin 5 in single point GND. The transistor and 5kΩ potentio-meter are used to sample the oscillator waveform and apply an adjustable Ramp to Pin 3.
UNDER-VOLTAGE LOCKOUT
Icc Vcc ON/OFF Command to rest of IC
<15mA
7
Von=16V Voff=10V
<1mA Voff Von
Vcc
During Under-Voltage Lockout, the output driver is biased to a high impedance state. Pin 6 should be shunt to GND with a bleeder resistor to prevent activating the power switch with output leakage currents.
UTC
UNISONIC TECHNOLOGIES CO., LTD.
3
QW-R103-002,A
UTC UC3842A / 3843A LINEAR INTEGRATED CIRCUIT
ERROR AMPLIFIER CONFIGURATION
2.5V
0.5mA
Zi Zf
2 1
Error amplifier ca.