2048-Channel/ 32-Highway Time-Slot Interchanger
|Total Page||30 Pages|
|Features||Datasheet pdf Preliminary Data Sheet February 1999 TT SI2K32T 2048-Channel, 32-Highway Time-S lot Interchanger Features s Applicatio ns s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s Thirty-two full-duplex, serial time -division multiplexed (TDM) highways. F ull availability, nonblocking 2048-chan nel time/ space switch. 2.048 Mbits/s ( 32 time slots), 4.096 Mbits/s (64 time slots), or 8.192 Mbits/s (128 time slot s) data rates, independently programmab le per highway. 64 kbits/s granularity with optional 32 kbits/s (4-bit) and 16 kbits/s (2-bit) subrate switching, sel ectable per highway. Low-latency mode f or voice channels. Frame integrity for wideband data applications. Concentr.|
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Preliminary Data Sheet
2048-Channel, 32-Highway Time-Slot Interchanger
s Thirty-two full-duplex, serial time-division multi-
plexed (TDM) highways.
s Full availability, nonblocking 2048-channel time/
s 2.048 Mbits/s (32 time slots), 4.096 Mbits/s (64
time slots), or 8.192 Mbits/s (128 time slots) data
rates, independently programmable per highway.
s 64 kbits/s granularity with optional 32 kbits/s (4-bit)
and 16 kbits/s (2-bit) subrate switching, selectable
s Low-latency mode for voice channels.
s Frame integrity for wideband data applications.
s Concentration highway interface (CHI) compatible
with the IOM2, GCI, K2, SLD, MVIP*, ST-Bus,
SC-Bus, and H.100.
s Single highway clock and frame synchronization
s Independently programmable bit and byte offsets
with 1/4 bit resolution for all highways.
s Capable of broadcasting data to the transmit high-
ways from a variety of sources including host data.
s High-impedance control per time slot.
s Software-compatible family of 1K, 2K, and 4K time-
s Thirty-two independent high-impedance indicators
(output enables) for transmit highways, allowing
s Direct access to device registers, connection store,
and data store via microprocessor interface.
s IEEE†1149.1 boundary scan (JTAG).
s Test-pattern generation and checking for on-line
system testing (PRBS, QRSS, or user-defined
s User-accessible BIST for data and connection
s 3.3 V power supply with 5 V tolerant I/O.
s Low-power, high-density CMOS technology, and
TTL compatible switching thresholds.
s 217-pin PBGA package.
s –40 °C to +85 °C operating temperature range.
* MVIP is a registered trademark of Natural Microsystems Corpo-
† IEEE is a registered trademark of The Institute of Electrical and
Electronics Engineers, Inc.
s Small and medium digital switch matrices.
s Computer telephony integration (CTI).
s Access concentrators.
s Cellular infrastructure.
s ISP modem banks.
s T1/E1 multiplexers.
s Digital cross connects.
s Digital loop carriers.
s Multiport DS1/E1 service cards.
s LAN/WAN gateways.
s TDM highway data rate adaptation.
The TTSI2K32T Time-Slot Interchanger (TSI)
switches data between 32 full-duplex, serial, time-
division multiplexed highways. The TTSI2K32T can
make any connection between 2048 input and output
Each of the 32 transmit and 32 receive highways can
be independently programmed for data rate
(2.048 Mbits/s, 4.096 Mbits/s, or 8.192 Mbits/s) and
offset. The offset can range from 0 bits to 127 bytes
and 7 3/4 bits on a 8.192 Mbits/s highway. The
TTSI2K32T can perform rate adaptation between
varying speed highways as well.
The TTSI2K32T is configured via a microprocessor
interface with a demultiplexed address and data bus.
In addition to accessing the registers and connection
store, this interface can also be used to read
received time slots and specify user data for trans-
The TTSI2K32T ensures that interchanged time slots
retain their frame integrity. Frame integrity is required
for applications that switch wideband data (i.e., ISDN
H-channels). For voice applications where low delay
is important, a low-latency mode can be selected.