Document
U4285BM
AM / FM - PLL
Description
The U4285BM is an integrated circuit in BICMOS technology for frequency synthesizers. It performs all the functions of a PLL radio tuning system and is controlled by an I2C bus. The device is designed for all frequency synthesizer applications in radio receivers, as well as RDS ( Radio Data System ) applications.
Features
D Reference oscillator up to 15 MHz D Two programmable 16 bit dividers
adjustable from 2 to 65535
D 4 programmable switching outputs
(open drain up to 15 V)
D Fine tuning steps:
AM FM
y 1 kHz y 2 kHz
D Few external component required due to
integrated loop-push-pull stage for AM/FM
D High signal/ noise ratio
Ordering Information
Extended Type Number U4285BM-AFS U4285BM-AFSG3 Package SSO20 plastic SSO20 plastic Remarks Taping according to IEC-286-3
Block Diagram
SWO1 SWO2 SWO3 SWO4 5 6 7 8 OSCIN 18 Oscillator OSCOUT 19 SCL 2 I2C bus interface Phase detector Current sources 15 16 17 12 13 N-divider 1 VDD Figure 1. 20 GND1 PDAMO VA C PDFMO PDFM R-divider Switching outputs 14 PDAM
SDA 3 AS FMOSC 4 9
AMOSC 11
AM/FM switch 10 GND2
95 10120
TELEFUNKEN Semiconductors Rev. A3, 14-May-97
1 (10)
U4285BM
Pin Description
VDD SCL 1 2 3 4 5 20 19 18 17 16 GND1 OSCOUT OSCIN C VA PDAMO PDAM PDFM PDFMO AMOSC Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol VDD SCL SDA AS SWO 1 SWO 2 SWO3 SWO4 FMOSC GND 2 AMOSC PDFMO PDFM PDAM PDAMO VA C OSCIN OSCOUT GND1 Function Supply voltage I2C bus clock I2C bus data Address selection Switching output 1 Switching output 2 Switching output 3 Switching output 4 FM oscillator input Ground 2 (analog) AM oscillator input FM analogue output FM current output AM current output AM analogue output Analogue supply voltage Capacitor Oscillator input Oscillator output Ground 1 (digital)
SDA AS SWO 1 SWO 2 SWO3 SWO4 FMOSC GND 2
U4285BM
6 7 8 9 10 15 14 13 12 11
95 10121
Functional Description
The U4285BM is controlled via the 2-wire I2C bus. For programming there are one module address byte, two subaddress bytes and five data bytes. The module address contains a programmable address bit A 1 which with address select input AS (Pin 4) makes it possible to operate two U4285BM in one system. If bit A 1 is identical with the status of the address select input AS, the chip is selected . The subaddress determines which one of the data bytes is transmitted first. If subaddress of R-divider is transmitted, the sequence of the next data bytes is DB 0 (Status), DB 1 and DB 2. If subaddress of N-divider is transmitted, the sequence of the next data bytes is DB 3 and DB 4. The bit organisation of the module address, subaddress and 5 data bytes are shown in figure 2. Each transmission on the I2C bus begins with the “START”- condition and has to be ended by the “STOP”condition (see figure 3). The integrated circuit U4285BM has two separate inputs for AM and FM oscillator. Pre-amplified AM and FM signals are fed to the 16 bit N-divider via AM/FM switch. AM/FM switch is con.