622 Mb/s Clock & Data Recovery
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The TQ8103 is a monolithic clock and data recovery (CDR) IC ...
Description
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S E M I C O N D U C T O R, I N C .
The TQ8103 is a monolithic clock and data recovery (CDR) IC that receives NRZ data, extracts the high-speed clock, and presents the separated data and clock as its outputs. This device is designed specifically for SONET OC-12 and SDH STM-4 applications at 622 Mb/s. Its on-chip phase-locked loop (PLL) generates a stable 622.08 Mb/s reference based upon an external 38.88 MHz TTL reference. The PLL is based on a VCO constructed from integrated reactive components, which form a low-jitter, high-Q differential tank circuit. Both frequency- and phase-detect circuits reliably acquire and hold lock in worst-case SONET jitter conditions and scrambling patterns. The lock-detect circuitry signals when the CDR acquires frequency lock. Typical SONET/SDH system applications for the TQ8103 include:
TQ8103
TELECOM PRODUCTS
622 Mb/s Clock & Data Recovery
Features
Single-chip CDR circuit for 622 Mb/s data Exceeds Bellcore and ITU jitter tolerance maps Single-ended ECL input has loopthrough path for external 50 ohm termination to minimize stubs and reflections Clock and data outputs are differential ECL Provides complete high-speed OC-12/STM-4 solution when used with TQ8101 or TQ8105 Mux/Demux/Framer/PLL External loop filter requires simple passive network Maintains clock in absence of data
Transmission system transport cards Switch and cross-connect line cards ATM physical layer interfaces Test equipment Add...
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