TN2435 DMOS FETs Datasheet

TN2435 Datasheet, PDF, Equivalent


Part Number

TN2435

Description

N-Channel Enhancement-Mode Vertical DMOS FETs

Manufacture

Supertex Inc

Total Page 5 Pages
Datasheet
Download TN2435 Datasheet


TN2435
TN2435
N-Channel Enhancement-Mode
Vertical DMOS FET
Features
Low threshold
High input impedance
Low input capacitance
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Applications
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
Ordering Information
Device
Package Option
TO-243AA (SOT-89)
TN2435
TN2435N8-G
-G indicates package is RoHS compliant (‘Green’)
BVDSS/BVDGS
(V)
350
RDS(ON)
(max)
(Ω)
6.0
Pin Configuration
DRAIN
ID(ON)
(min)
(A)
1.0
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BVDSS
BVDGS
±20V
Operating and storage temperature -55OC to +150OC
Soldering temperature*
300OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
SOURCE
DRAIN
GATE
TO-243AA (SOT-89) (N8)
Product Marking
TN4SW
W = Code for week sealed
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-243AA (SOT-89) (N8)
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com

TN2435
TN2435
Thermal Characteristics
Package
(continIDuous)
(mA)
ID
(pulsed)
(A)
TO-243AA (SOT-89)
365
Notes:
MID o(cuonntetidnuoonuFs)Ri5s
limited
Board,
b2y5mmmaxxra2t5emdmTj
.
x
1.57mm.
1.8
Power Dissipation
@TA = 25OC
(W)
1.6
θjc
(OC/W)
15
θja
(OC/W)
78
IDR
(mA)
365
IDRM
(A)
1.8
Electrical Characteristics (TA = 25OC unless otherwise specified)
Sym Parameter
Min Typ Max Units Conditions
BVDSS Drain-to-source breakdown voltage
350 - - V VGS = 0V, ID = 250µA
VGS(th) Gate threshold voltage
0.8 - 2.5 V VGS = VDS, ID= 1.0mA
ΔVGS(th) Change in VGS(th) with temperature
- - -5.5 mV/OC VGS = VDS, ID= 1.0mA
IGSS Gate body leakage
- - 100 nA VGS = ± 20V, VDS = 0V
IDSS Zero gate voltage drain current
- - 10 µA VGS = 0V, VDS = Max Rating
-
-
1.0
mA
VDS = 0.8Max Rating,
VGS = 0V, TA = 125°C
ID(ON) On-state drain current
0.5 - - A VGS = 4.5V, VDS = 25V
1.0 -
-
VGS = 10V, VDS = 25V
- - 15
VGS = 3.0V, ID = 150mA
RDS(ON) Static drain-to-source on-state resistance
-
- 10
Ω VGS = 4.5V, ID = 250mA
- - 6.0
VGS = 10V, ID = 750mA
ΔRDS(ON) Change in RDS(ON) with temperature
- - 1.7 %/OC VGS = 10V, ID = 750mA
GFS Forward transductance
125 -
- mmho VDS = 20V, ID = 350mA
CISS
COSS
CRSS
Input capacitance
Common source output capacitance
Reverse transfer capacitance
- 125 200
VGS = 0V,
- 25 70 pF VDS = 25V,
- 8.0 25
f = 1.0MHz
td(ON)
tr
td(OFF)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
- 5.0 20
- 10 20
- 28 40
- 10 30
VDD = 25V,
ns ID = 750mA,
RGEN = 25Ω
VSD Diode forward voltage drop
- - 1.5 V VGS = 0V, ISD = 750mA
trr Reverse recovery time
- 300 -
ns VGS = 0V, ISD = 750mA
Notes:
1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
10V
INPUT
90%
0V 10%
t(ON)
t(OFF)
td(ON)
tr
td(OFF)
tF
VDD
OUTPUT
0V
10%
90%
10%
90%
PULSE
GENERATOR
RGEN
INPUT
VDD
RL
OUTPUT
D.U.T.
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
2


Features TN2435 N-Channel Enhancement-Mode Verti cal DMOS FET Features ► Low threshol d ► High input impedance ► Low inpu t capacitance ► Fast switching speeds ► Low on-resistance ► Free from se condary breakdown ► Low input and out put leakage Applications ► Logic leve l interfaces - ideal for TTL and CMOS Solid state relays ► Battery opera ted systems ► Photo voltaic drives Analog switches ► General purpose l ine drivers ► Telecom switches Gener al Description This low threshold, enha ncement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handl ing capabilities of bipolar transistors and the high input impedance and posit ive temperature coefficient inherent i n MOS devices. Characteristic of all MO S structures, this device is free from thermal runaway and thermally-induced s econdary breakdown. Supertex’s vertical DMOS FETs are ideally.
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