TN2510 DMOS FETs Datasheet

TN2510 Datasheet, PDF, Equivalent


Part Number

TN2510

Description

N-Channel Enhancement-Mode Vertical DMOS FETs

Manufacture

Supertex Inc

Total Page 5 Pages
Datasheet
Download TN2510 Datasheet


TN2510
TN2510
N-Channel Enhancement-Mode
Vertical DMOS FET
Features
Low threshold (2.0V max.)
High input impedance
Low input capacitance (125pF max.)
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Applications
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Ordering Information
Device
Package Options
TO-243AA (SOT-89)
Die*
TN2510
TN2510N8-G
-G indicates package is RoHS compliant (‘Green’).
* MIL visual screening available.
TN2510ND
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
BVDSS/BVDGS
(V)
100
RDS(ON)
(max)
(Ω)
1.5
ID(ON)
(min)
(A)
3.0
VGS(th)
(max)
(V)
2.0
Pin Configuration
DRAIN
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BVDSS
BVDGS
±20V
Operating and storage temperature -55OC to +150OC
Soldering temperature*
300OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
SOURCE
DRAIN
GATE
TO-243AA (SOT-89) (N8)
Product Marking
TN5AW
W = Code for week sealed
= “Green” Packaging
TO-243AA (SOT-89) (N8)
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com

TN2510
TN2510
Thermal Characteristics
Package
(continIDuous)
(mA)
ID
(pulsed)
(A)
TO-243AA (SOT-89)
730
Notes:
MID o(cuonntetidnuoonuFs)Ri5s
limited
Board,
b2y5mmmaxxra2t5emdmTj
.
x
1.57mm.
5.0
Power Dissipation
@TA = 25OC
(W)
1.6
θjc
(OC/W)
15
θja
(OC/W)
78
IDR
(mA)
730
IDRM
(A)
5.0
Electrical Characteristics (TA = 25OC unless otherwise specified)
Sym Parameter
Min Typ Max Units Conditions
BVDSS Drain-to-source breakdown voltage
100 - - V VGS = 0V, ID = 2.0mA
VGS(th) Gate threshold voltage
0.6 - 2.0 V VGS = VDS, ID= 1.0mA
ΔVGS(th) Change in VGS(th) with temperature
- - -4.5 mV/OC VGS = VDS, ID= 1.0mA
IGSS Gate body leakage
- - 100 nA VGS = ± 20V, VDS = 0V
IDSS Zero gate voltage drain current
- - 10 µA VGS = 0V, VDS = Max Rating
-
-
1.0
mA
VDS = 0.8 Max Rating,
VGS = 0V, TA = 125°C
ID(ON) On-state drain current
1.2 2.0
3.0 6.0
-
-
A VGS = 5.0V, VDS = 25V
VGS = 10V, VDS = 25V
- - 15
VGS = 3.0V, ID = 250mA
RDS(ON) Static drain-to-source on-state resistance
- 1.5 2.0 Ω VGS = 4.5V, ID = 750mA
- 1.0 1.5
VGS = 10V, ID = 750mA
ΔRDS(ON) Change in RDS(ON) with temperature
- - 0.75 %/OC VGS = 10V, ID = 750mA
GFS Forward transductance
400 800
- mmho VDS = 25V, ID = 1.0A
CISS
COSS
CRSS
Input capacitance
Common source output capacitance
Reverse transfer capacitance
- 70 125
VGS = 0V,
- 30 70 pF VDS = 25V,
- 15 25
f = 1.0MHz
td(ON)
tr
td(OFF)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
- - 10
- - 10
VDD = 25V,
-
-
20
ns ID = 1.5A,
RGEN = 25Ω
- - 10
VSD Diode forward voltage drop
- - 1.8 V VGS = 0V, ISD = 1.5A
trr Reverse recovery time
- 300 -
ns VGS = 0V, ISD = 1.5A
Notes:
1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
10V
INPUT
0V 10%
t(ON)
90%
t(OFF)
td(ON)
tr
td(OFF)
tF
PULSE
GENERATOR
RGEN
VDD
RL
OUTPUT
VDD
OUTPUT
0V
10%
90%
10%
90%
INPUT
D.U.T.
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
2


Features TN2510 N-Channel Enhancement-Mode Verti cal DMOS FET Features ► Low threshol d (2.0V max.) ► High input impedance ► Low input capacitance (125pF max.) ► Fast switching speeds ► Low on-re sistance ► Free from secondary breakd own ► Low input and output leakage Complementary N- and P-channel device s General Description This low thresho ld, enhancement-mode (normally-off) tra nsistor utilizes a vertical DMOS struct ure and Supertex’s well-proven, silic on-gate manufacturing process. This com bination produces a device with the pow er handling capabilities of bipolar tra nsistors and the high input impedance a nd positive temperature coefficient in herent in MOS devices. Characteristic o f all MOS structures, this device is fr ee from thermal runaway and thermally-i nduced secondary breakdown. Applicatio ns ► Logic level interfaces - ideal f or TTL and CMOS ► Solid state relays ► Battery operated systems ► Photo voltaic drives ► Analog switches ► General purpose line dri.
Keywords TN2510, datasheet, pdf, Supertex Inc, N-Channel, Enhancement-Mode, Vertical, DMOS, FETs, N2510, 2510, 510, TN251, TN25, TN2, Equivalent, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)