DMOS FETs. TN2640 Datasheet


TN2640 FETs. Datasheet pdf. Equivalent


TN2640


N-Channel Enhancement-Mode Vertical DMOS FETs
Supertex inc.

TN2640

N-Channel Enhancement-Mode Vertical DMOS FETs

Features
►►Low threshold (2.0V max.) ►►High input impedance ►►Low input capacitance ►►Fast switching speeds ►►Low on-resistance ►►Free from secondary breakdown ►►Low input and output leakage
Applications
►►Logic level interfaces - ideal for TTL and CMOS ►►Solid state relays ►►Battery operated systems ►►Photo voltaic drives ►►Analog switches ►►General purpose line drivers ►►Telecom switches

General Description
This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced second...



TN2640
Supertex inc.
TN2640
N-Channel Enhancement-Mode
Vertical DMOS FETs
Features
►Low threshold (2.0V max.)
►High input impedance
►Low input capacitance
►Fast switching speeds
►Low on-resistance
►Free from secondary breakdown
►Low input and output leakage
Applications
►Logic level interfaces - ideal for TTL and CMOS
►Solid state relays
►Battery operated systems
►Photo voltaic drives
►Analog switches
►General purpose line drivers
►Telecom switches
General Description
This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
Ordering Information
Part Number
Package Option
Packing
TN2640K4-G
TO-252 (D-PAK)
2000/Reel
TN2640LG-G
8-Lead SOIC
2500/Reel
TN2640N3-G
3-Lead TO-92
1000/Bag
TN2640N3-G P002
TN2640N3-G P003
TN2640N3-G P005 3-Lead TO-92
2000/Reel
TN2640N3-G P013
TN2640N3-G P015
For packaged products, -G indicates package is RoHS compliant (‘Green’).
TO-92 taping specifications and winding styles per EIA-468 Standard.
Devices in Wafer / Die form are RoHS compliant (‘Green’).
Refer to Die Specification VF57 for layout and dimensions.
Product Summary
BVDSS/BVDGS
RDS(ON)
(max)
400V
5.0Ω
Pin Configuration
DRAIN
SOURCE
GATE
TO-252 (D-PAK)
ID(ON)
(min)
2.0A
VGS(th)
(max)
2.0V
DRAIN
DRAIN
DRAIN
DRAIN
GATE
SOURCE
N/C
N/C
8-Lead SOIC
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BVDSS
BVDGS
±20V
Operating and storage temperature -55°C to +150°C
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
SOURCE
DRAIN
GATE
TO-92
Typical Thermal Resistance
Package
θja
TO-252 (D-PAK)
81OC/W
8-Lead SOIC
101OC/W
TO-92
132OC/W
Doc.# DSFP-TN2640
C071913
Supertex inc.
www.supertex.com

TN2640
Product Marking
Si YYWW
TN2640
LLLLLLL
YY = Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-252 (D-PAK)
TN2640
YYWW
N2640
LLLL
YY = Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
Package may or may not include the following marks: Si or
8-Lead SOIC
SiTN
2640
YYWW
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-92
Thermal Characteristics
Package
(continIDuous)
ID
(pulsed)
TO-252 (D-PAK)
500mA
3.0A
8-Lead SOIC
260mA
2.0A
TO-92
220mA
Notes:
MID o(cuonntetidnuoonuFs)Ri4s
limited
board,
2b5ymmmaxxr2a5temdmTj.x
1.57mm
2.0A
Power Dissipation
@TA = 25OC
2.5W
1.3W
0.74W
IDR
500mA
260mA
220mA
IDRM
3.0A
2.0A
2.0A
Electrical Characteristics (TA = 25°C unless otherwise specified)
Sym Parameter
Min Typ
BVDSS
VGS(th)
ΔVGS(th)
Drain-to-source breakdown voltage
Gate threshold voltage
Change in VGS(th) with temperature
400 -
0.8 -
- -2.5
IGSS Gate body leakage
IDSS Zero gate voltage drain current
-
--
--
Max
-
2.0
-4.0
100
10
1.0
ID(ON) On-state drain current
RDS(ON)
Static drain-to-source
on-state resistance
ΔRDS(ON)
GFS
CISS
COSS
CRSS
Change in RDS(ON) with temperature
Forward transconductance
Input capacitance
Common source output capacitance
Reverse transfer capacitance
1.5 3.5
-
2.0 4.0
-
- 3.2 5.0
- 3.0 5.0
- - 0.75
200 330
-
- 210 225
- 30 50
- 8.0 15
Units
V
V
mV/OC
nA
µA
mA
A
Ω
%/OC
mmho
Conditions
VGS = 0V, ID = 1.0mA
VGS = VDS, ID = 2.0mA
VGS = VDS, ID = 2.0mA
VGS = ±20V, VDS = 0V
VGS = 0V, VDS = Max rating
VDS = 0.8 Max Rating,
VGS = 0V, TA = 125OC
VGS = 5.0V, VDS = 25V
VGS = 10V, VDS = 25V
VGS = 4.5V, ID = 500mA
VGS = 10V, ID = 500mA
VGS = 10V, ID = 500mA
VDS = 25V, ID = 100mA
VGS = 0V,
pF VDS = 25V,
f = 1.0MHz
Doc.# DSFP-TN2640
C071913
Supertex inc.
2 www.supertex.com




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