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TODV 640 ---> 1240
ALTERNISTORS
. . .
FEATURES HIGH COMMUTATION : > 142 A/ms (400Hz) INSULATING VOLTAGE = 2500V(RMS) (UL RECOGNIZED : EB1734) HIGH VOLTAGE CAPABILITY : VDRM = 1200 V
A2 G A1
DESCRIPTION The TODV 640 ---> 1240 use a high performance passivated glass alternistor technology. Featuring very high commutation levels and high surge current capability, this family is well adapted to power control on inductive load (motor, transformer...) ABSOLUTE RATINGS (limiting values)
Symbol IT(RMS) RMS on-state current (360° conduction angle) Non repetitive surge peak on-state current ( Tj initial = 25°C ) Parameter Tc = 75 °C Value 40 Unit A
RD91 (Plastic)
ITSM
tp = 2.5 ms tp = 8.3 ms tp = 10 ms
590 370 350 610 20 100 - 40 to + 150 - 40 to + 125 260
A
I2t dI/dt
I2t value Critical rate of rise of on-state current Gate supply : IG = 500mA diG/dt = 1A/µs
tp = 10 ms Repetitive F = 50 Hz Non Repetitive
A2s A/µs
Tstg Tj Tl
Storage and operating junction temperature range Maximum lead temperature for soldering during 10 s at 4.5 mm from case
°C °C °C
Symbol
Parameter 640 840 800
TODV 1040 1000 1240 1200
Unit
VDRM VRRM
Repetitive peak off-state voltage Tj = 125 °C
600
V
March 1995
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TODV 640 ---> 1240
THERMAL RESISTANCES
Symbol Rth (c-h) Parameter Contact (case-heatsink) with grease Value 0.1 1.2 0.9 Unit °C/W °C/W °C/W
Rth (j-c) DC Junction to case for DC Rth (j-c) AC Junction to case for 360 ° conduction angle ( F= 50 Hz)
GATE CHARACTERISTICS (maximum values)
PG (AV) = 1W PGM = 40W (tp = 20 µs) IGM = 8A (tp = 20 µs) VGM = 16V (tp = 20 µs).
ELECTRICAL CHARACTERISTICS
Symbol IGT VGT VGD tgt VD=12V VD=12V Test Conditions (DC) RL=33Ω (DC) RL=33Ω Tj=25°C Tj=25°C Tj=125°C Tj=25°C Tj=25°C Quadrant I-II-III I-II-III I-II-III I-II-III MAX MAX MIN TYP Value 200 1.5 0.2 2.5 Unit mA V V µs mA
VD=VDRM RL=3.3kΩ VD=VDRM IG = 500mA dIG/dt = 3A/µs IG=1.2 IGT
IL
I-III II
TYP
100 200
IH * VTM * IDRM IRRM dV/dt *
IT= 500mA gate open ITM = 60A tp= 380µs VDRM VRRM Rated Rated
Tj=25°C Tj=25°C Tj=25°C Tj=125°C Tj=125°C
TYP MAX MAX MAX MIN
50 1.8 0.02 8 500
mA V mA
Linear slope up to VD=67%VDRM gate open (dV/dt)c = 200V/µs (dV/dt)c = 10V/µs
V/µs
(dI/dt)c *
Tj=125°C
MIN
35 142
A/ms
* For either polarity of electrode A2 voltage with reference to electrode A1.
2/5
TODV 640 ---> 1240
Fig.1 : Maximum RMS power dissipation versus RMS on-state current (F=50Hz). (Curves are cut off by (dI/dt)c limitation) Fig.2 : Correlation between maximum RMS power dissipation and maximum allowable temperatures (Tamb and Tcase) for different thermal resistances heatsink + contact.
Fig.3 : RMS on-state current versus case temperature.
Fig.4 : Relative variation of thermal impedance junction to case versus pulse duration.
Zth(j-c)/Rth(j-c) 1
0.1
tp (s)
0.01 1E-3
1E-2
1E-1
1E +0
1 E+1
Fig.5 : Relative variation of gate trigger current and holding current versus junction temperature.
Fig.6 : Non Repetitive surge peak on-state current versus n.