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TMUX03155 Dataheets PDF



Part Number TMUX03155
Manufacturers Agere Systems
Logo Agere Systems
Description TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
Datasheet TMUX03155 DatasheetTMUX03155 Datasheet (PDF)

Preliminary Data Sheet April 2001 TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer Features I Applications I I I I I Multiplexes three STS-1 signals into a SONET STS-3 signal. Multiplexes three AU-3 signals into an SDH STM-1 (AU-4) signal via a TUG-3 construction. Demultiplexes three STS-1 signals from a SONET STS-3 signal. Demultiplexes three AU-3 signals from an SDH STM-1 (AU-4) signal via a TUG-3 deconstruction. High-speed microprocessor interface configurable to operate with most co.

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Preliminary Data Sheet April 2001 TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer Features I Applications I I I I I Multiplexes three STS-1 signals into a SONET STS-3 signal. Multiplexes three AU-3 signals into an SDH STM-1 (AU-4) signal via a TUG-3 construction. Demultiplexes three STS-1 signals from a SONET STS-3 signal. Demultiplexes three AU-3 signals from an SDH STM-1 (AU-4) signal via a TUG-3 deconstruction. High-speed microprocessor interface configurable to operate with most commercial microprocessors. Detects STS-3/STM-1 (AU-4) loss-of-signal (LOS) conditions. Detects STS-3/STM-1 (AU-4) out-of-frame and loss-of-frame (OOF/LOF) conditions. Provides an 8-bit bus interface at the STS-1/AU-3 rate. Provides a bit serial, nibble-wide, or byte-wide interface at STS-3/STM-1 (AU-4) rate. Provides STS-3/STM-1 (AU-4) selectable scrambler/descrambler functions and B1/B2/B3 generation/detection. Accepts bit rate, nibble rate, or byte rate highspeed clocks (155.52 MHz, 38.88 MHz, or 19.44 MHz, respectively). STS-3/STM-1 (AU-4) internal clock and data recovery. Meets type B jitter tolerance of ITU-T G.958. Accommodates 0.5 UI jitter up to 20 MHz. 155.52 MHz input reference clock for on-chip PLL. Has on-chip PLL for clock synthesis, requiring only one external resistor. No output clock drift in absence of data transitions once lock is acquired. STS-1 termination mode. –40 °C to +85 °C temperature range. 208-pin, shrink quad flat pack (SQFP) package. Complies with GR-253-CORE (12/95), G.707 (3/96), G.783(1/94). SONET/SDH line termination equipment. SDH path origination and termination equipment. SONET/SDH add/drop multiplexers. SONET/SDH cross connects. SONET/SDH test equipment. I I I Description The TMUX03155 STS-3/STM-1 (AU-4) multiplexer device provides three modes of operation: STS-3, STM-1 (AU-4), and STS-1 modes. In STS-3 mode, the TMUX03155 device provides all of the functions necessary to multiplex and demultiplex up to three STS-1 signals to/from a SONET STS-3 signal. In AU-4 mode, the TMUX03155 provides the functionality to multiplex and demultiplex up to three AU-3 signals to/from an STM-1 (AU-4) signal. In STS-1 mode, the high-speed side of the TMUX03155 operates at 51.84 MHz and can be used for STS-1 termination and for accessing transport overhead in the SONET frame. On the STS-3/STM-1 (AU-4) side, the device can be configured for either a 1-bit serial data interface, a 4-bit parallel (nibble-wide) data interface, or an 8-bit parallel (byte-wide) data interface. This allows the device to drive an OC3 optical signal directly or to allow for modular growth in terminal or add/drop applications. On the STS-1/AU-3 side, the TMUX03155 device provides a bus mode that can communicate with up to three STS-1/AU-3 devices at 19.44 Mbits/s. The TMUX03155 is designed to interface with the Agere Systems Inc. TMPR28051 device, or equivalent, providing complete mapping/ unmapping from/to an STS-3/STM-1 (AU-4) signal for up to 84 DS1 or 63 E1 signals. I I I I I I I I I I I I TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer Preliminary Data Sheet April 2001 Table of Contents Contents Page Features ................................................................................................................................................................... 1 Applications .............................................................................................................................................................. 1 Description ................................................................................................................................................................ 1 Nomenclature Assumptions ...................................................................................................................................... 7 Block Diagram ..........................................................................................................................................................7 Pin Information ......................................................................................................................................................... 9 Summary of I/O Pins .........................................................................................................................................15 Mode Control Signals (See Register Description on page 54.) ..............................................................................16 STS-1 Mode ...........................................................................................................................................................16 Transmit Direction Overview ..................................................................................................................................17 STS-1/AU-3 Bus Mode Input Retiming ..............................................................................................................17 Input Select Control .....


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