Document
Adjustable LITIXTM Linear
TLE 4242 G
Features
• Adjustable constant current up to 500 mA (±5%) • Wide input voltage range up to 42 V • Low drop voltage • Open load detection • Overtemperature protection • Short circuit proof • Reverse polarity proof • Wide temperature range: -40 °C to 150 °C • Green Product (RoHS compliant) • AEC Qualified
P-TO263-7-1
Functional Description
The TLE 4242 G is an integrated adjustable constant current source driving loads up to 500 mA. The output current level can be adjusted via an external resistor. The IC is designed to supply high power LEDs (e.g. Osram Dragon LA W57B) under the severe conditions of automotive applications resulting in constant brightness and extended LED lifetime. It is provided in the surface mounted PG-TO263-7-1 package. Protection circuits prevent damage to the device in case of overload, short circuit, reverse polarity and overheat. The connected LEDs are protected against reverse polarity as well as excess voltages up to 45 V.
The integrated PWM input of the TLE 4242 G permits LED brightness regulation by pulse width modulation. Due to the high input impedance of the PWM input the LITIXTM Linear can be operated as a protected high side switch.
Type TLE 4242 G
Data Sheet
Package PG-TO263-7-1
1
Rev. 1.1, 2007-03-20
TLE 4242 G
Circuit Description
I1
PWM 2
Bias Supply
Bandgap Reference
Comparator Status Delay
7Q
5 REF 3 ST
4 GND
6 D
AEB03500.VSD
Figure 1 Block Diagram
An external shunt resistor in the ground path of the connected LEDs is used to sense the LED current. A regulation loop helds the voltage drop at the shunt resistor on a constant level of typ. 177 mV. Selecting the shunt resistance permits to adjust the appropriate constant current level. The typ. output current calculates
IQ, typ = VR-----RR---EE---FF-
(1)
where VREF is the reference voltage with a typical level of 177 mV (see Page 10). The equation applies in a range of 0.39 Ω ≤ RREF ≤ 1.8 Ω.
The output current is shown as a function of the reference resistance on Page 10. With the PWM input the LED brightness can be regulated via duty cycle. Also PWM = L sets the TLE 4242 in sleep mode resulting in a very low current consumption of << 1 μA typ. Due to the high impedance of the PWM input (see “PWM Pin Input Current versus PWM Voltage” on Page 11) the PWM pin can thus also be used as an enable input.
Data Sheet
2 Rev. 1.1, 2007-03-20
TLE 4242 G
17
Ι ST REF Q
PWM GND D AEP01938_4242
Figure 2 Pin Configuration (top view)
Table 1 Pin No. 1
2 3
4 5 6
7
Pin Definitions and Functions
Symbol Function
I Input; block to GND directly at the IC with a 100 nF ceramic capacitor.
PWM
Pulse Width Modulation Input; if not needed connect to I
ST GND
Status Output; open collector output, connect to external pull-up resistor (Rpull-up ≥ 4.7 kΩ).
Ground
REF
Reference Input; connect to shunt resistor.
D Status Delay; connect to GND via an optional capacitor to set status reaction delay. Leave open if no ST delay is needed.
Q Output
Data Sheet
3 Rev. 1.1, 2007-03-20
TLE 4242 G
Application Information
VBAT
I RO
TLE 4269 G SI
RADJ GND
Q D
100 nF
10 µF
10 kΩ
µC
ST I
PWM Q
TLE 4242 G
GND
REF D
47 nF
LED Dragon
0.47 Ω 0.25 W
RREF
AEA03499.VSD
Figure 3 Application Circuit
Figure 3 shows a typical application with the TLE 4242 G LITIXTM Linear. The 3 LEDs are driven with an adequate supply current adjusted by the resistor RREF. Thus brightness variations due to forward voltage spread of the LEDs are prevented. The luminosity spread arising from the LED production process can be compensated via software by an appropriate duty cycle applied to the PWM pin. Hence selection of the LEDs to forward voltage as well as to luminosity classes can be spared. The minimum supply voltage calculates as the sum of the LED forward voltages, the TLE 4242 G drop voltage (max. 0.7 V at a LED current of 300 mA) and the max. voltage drop at the shunt resistor RREF of max. 185 mV. The status output of the LITIXTM Linear (ST) detects an open load condition enabling to supervise correct LED function. A LED failure is detected if the voltage drop at the shunt resistor RREF falls below typ. 25 mV. In this case the status output pin ST is set low after a delay time adjustable via an optional capacitor connected to the pin D.
Data Sheet
4 Rev. 1.1, 2007-03-20
TLE 4242 G
The functionality of the ST and PWM as well as their timings are shown in Figure 4. The
Status delay can be adjusted via the capacitor connected to the timing Pin D. The delay time scales in linear way with the capacitance CD:
tSTHL,typ = 4----7C-----nD---F-- × 10 ms
tSTLH,typ = 4----7C-----nD---F-- × 10 μs
(2)
VI Open Load
VPWM VPWM, H VPWM, L
IQ mA 256
VD
VUD VLD VST
t
tPWM, ON
tPWM, OFF
t
tSTHL
t
t
VSTL
Figure 4 Function and Timing Diagram
Data Sheet
5
t
AET03505.VSD
Rev. 1.1, 2007-03-20
TLE 4242 G
Table 2
Absolute Maximum Ratings
-40 °C < Tj < 150 °C Parameter
Symbol
Input
Voltage Curren.