video interface. TDA8758 Datasheet

TDA8758 interface. Datasheet pdf. Equivalent

Part TDA8758
Description YC 8-bit low-power analog-to-digital video interface
Feature INTEGRATED CIRCUITS DATA SHEET TDA8758 YC 8-bit low-power analog-to-digital video interface Produc.
Manufacture NXP
Datasheet
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INTEGRATED CIRCUITS DATA SHEET TDA8758 YC 8-bit low-power TDA8758 Datasheet
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TDA8758
INTEGRATED CIRCUITS
DATA SHEET
TDA8758
YC 8-bit low-power
analog-to-digital video interface
Product specification
Supersedes data of 1995 Mar 22
File under Integrated Circuits, IC02
1996 Feb 01



TDA8758
Philips Semiconductors
YC 8-bit low-power analog-to-digital
video interface
Product specification
TDA8758
FEATURES
Two 8-bit ADCs:
– one Luminance or CVBS channel
– one Chrominance channel
Sampling rate up to 32 MHz
Binary or two's complement 3-state TTL outputs for
each channel
Internal reference voltage regulator
TTL-compatible digital inputs and outputs
Power dissipation of 530 mW (typical)
Input selector circuit (five selectable video inputs for
CVBS or YC processing)
Peak white enable input
Clamp and Automatic Gain Control (AGC) functions for
Y/CVBS channel (clamping on code 64 and Peak White
level control at code 255)
Clamp function for C channel (code 128)
No sample-and-hold circuit required.
APPLICATIONS
Video signal decoding
Digital picture processing
Frame grabbing
Multimedia with the Philips Desktop Video chip set (and
especially SAA7196 multistandard decoder and scaler).
GENERAL DESCRIPTION
The TDA8758 is an 8-bit video high-speed low-power
analog-to-digital conversion (ADC) interface for YC and
CVBS signal processing. It converts 1-of-3 CVBS input
signals or 1-of-2 YC input signals into binary or two’s
complement words at a sampling rate of 32 MHz.
All analog signal inputs are digitally clamped and an ADC
interface is provided on the Y/CVBS channel. A fast
precharge on clamp and AGC is provided for start-up.
All digital inputs and outputs are TTL compatible.
QUICK REFERENCE DATA
SYMBOL
VCCA
VCCD
VCCO
ICCA
ICCD
ICCO
ILE
DLE
EB
fclk(max)
B
αct
Ptot
PARAMETER
CONDITIONS
analog supply voltage
digital supply voltage
output stages supply voltage
analog supply current
digital supply current
output supply current
DC integral linearity error
CL = 15 pF
DC differential linearity error
effective bits
(from video input to digital outputs)
maximum clock frequency
fclk = 32 MHz;
fi = 4.43 MHz
maximum 3 dB bandwidth
(input preamplifier)
full-scale; 0 dB gain
crosstalk between Y and C channels
and each video input
total power dissipation
MIN.
4.75
4.75
4.75
TYP.
5.0
5.0
5.0
59
28
19
±0.75
±0.4
7.1
MAX.
5.25
5.25
5.25
70
40
28
±1.5
±1.0
UNIT
V
V
V
mA
mA
mA
LSB
LSB
bits
30 32
15
MHz
MHz
− −63 55 dB
530 724 mW
ORDERING INFORMATION
TYPE
NUMBER
TDA8758G
NAME
LQFP48
PACKAGE
DESCRIPTION
plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm
VERSION
SOT313-2
1996 Feb 01
2





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