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TDA9102T Dataheets PDF



Part Number TDA9102T
Manufacturers ST Microelectronics
Logo ST Microelectronics
Description H/V PROCESSOR FOR TTL V.D.U
Datasheet TDA9102T DatasheetTDA9102T Datasheet (PDF)

TDA9102C/T H/V PROCESSOR FOR TTL V.D.U . . . . . . . . . . . . . . . . HORIZONTAL SECTION SYNCHRONIZATION INPUT : TTL COMPATIBLE, NEGATIVE EDGE TRIGGERED SYNCHRONIZATION INDEPENDENT FROM DUTY CYCLE TIME OSCILLATOR : FREQUENCY RANGE FROM 15kHz to 100kHz HORIZONTAL OUTPUT PULSE SHAPER AND SHIFTER PHASE COMPARATOR BETWEEN SYNCHRO AND OSCILLATOR (PLL1) PHASE COMPARATOR BETWEEN FLYBACK AND OSCILLATOR (PLL2) INTERNAL VOLTAGE REGULATOR DC COMPATIBLE CONTROLS FOR PHASE AND FREQUENCY HORIZONTAL OUTPUT .

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TDA9102C/T H/V PROCESSOR FOR TTL V.D.U . . . . . . . . . . . . . . . . HORIZONTAL SECTION SYNCHRONIZATION INPUT : TTL COMPATIBLE, NEGATIVE EDGE TRIGGERED SYNCHRONIZATION INDEPENDENT FROM DUTY CYCLE TIME OSCILLATOR : FREQUENCY RANGE FROM 15kHz to 100kHz HORIZONTAL OUTPUT PULSE SHAPER AND SHIFTER PHASE COMPARATOR BETWEEN SYNCHRO AND OSCILLATOR (PLL1) PHASE COMPARATOR BETWEEN FLYBACK AND OSCILLATOR (PLL2) INTERNAL VOLTAGE REGULATOR DC COMPATIBLE CONTROLS FOR PHASE AND FREQUENCY HORIZONTAL OUTPUT DUTY CYCLE : 41% DIP20 (0.25) (Plastic package) ORDER CODES : TDA9102C/T VERTICAL SECTION SYNCHRONIZATION INPUT : TTL COMPATIBLE, NEGATIVE EDGE TRIGGERED SYNCHRONIZATION INDEPENDENT FROM DUTY CYCLE TIME OSCILLATOR : FREQUENCY RANGE FROM 30Hz to 120Hz RAMP GENERATOR WITH VARIABLE GAIN STAGE VERTICAL RAMP VOLTAGE REFERENCE INTERNAL VOLTAGE REGULATOR DC COMPATIBLE CONTROLS FOR FREQUENCY, AMPLITUDE AND LINEARITY PIN CONNECTIONS Substrate Ground 11 10 Horizontal Phase Adjust Vertical Frequency Preset 12 9 Phase Comparator 2 Output C13 13 8 Horizontal Flyback Input Vertical TTL Input 14 7 Horizontal Output Vertical Ramp Output 15 6 Horizontal Power Ground Vertical Amplitude Adjust 16 5 C5 Vertical Linearity Adjust 17 4 Horizontal TTL Input DESCRIPTION The TDA9102C/T is a monolithic integrated circuit for horizontal and vertical sync processing in monochrome and color video displays driven by input TTL compatible signals. The TDA9102C/T is supplied in a 20 pin dual in line package with pin 11 connected to ground and used for heatsinking. May 1994 Linearity Output 18 3 Phase Comparator 1 Output Vertical Reference Voltage V S 19 2 C2 20 1 R1 1/7 9102T-01.EPS 2/7 DC FREQUENCY ADJUSTEMENT VS R3 C1 C3 R2 C2 R1 10 3 1 2 20 11 PHASE COMPARATOR ϕ1 VOLTAGE REGULATOR 19 VREF HORIZONTAL OSCILLATOR HORIZONTAL TTL INTERFACE LOW SUPPLY VOLTAGE PROTECTION 15 TDA9102C/T BLOCK DIAGRAM DC HORIZONTAL PHASE ADJUSTEMENT TDA9102C/T + 5V R4 HORIZONTAL SYNC. INPUT 4 DC VERTICAL 16 AMPLITUDE ADJUSTEMENT VERTICAL TTL INTERFACE VERTICAL OSCILLATOR 13 5 C5 VS C13 12 HOR. PULSE SHAPER ϕ2 PHASE COMPARATOR DC FREQUENCY PRESET R18 R12 7 C18 6 9 8 14 17 18 + 5V C9 R8 R14 DC VERTICAL LINEARITY ADJUSTEMENT HORIZONTAL FLYBACK INPUT VERTICAL SYNC. INPUT 9102T-02.EPS TDA9102C/T ABSOLUTE MAXIMUM RATINGS Symbol VS VSYNC IOH I15 I19 Ptot Tstg , Tj Supply Voltage Sync Input Peak Voltage Output Sinking Peak Current (Pin 7 ; t < 3µs) Output Current (Pin 15) Output Current (Pin 19) Total power dissipation (Tamb < 70 C) Storage and Junction Temperature o Parameter Value 18 + VS 2 - 10 - 10 1 - 40, + 150 Unit V V A mA W o 9102T-01.TBL mA C THERMAL DATA Symbol Rth(j-a) Parameter Junction-ambient Thermal Resistance Value 80 Unit o C/W ELECTRICAL CHARACTERISTICS (Tamb = 25oC, VS = 12V, refer to the test circuits, unless otherwise specified) Symbol HORIZONTAL SECTION VS IS V1 I1 V2 K0 V3 - V1 I3 K3 V4 I4 T4 V5 t5 t7 V7 sat tD Supply Voltage Range Supply Current Voltage Reference at Pin 1 Current at Pin 1 Voltage Swing at Pin 2 Free Running Frequency Constant Control Voltage Range Peak Control Current Gain Phase Comparator φ1 K3 = 2 x I3 / 360 Sync Threshold Input (neg. edge) Current at Pin 4 Input Pulse Duration T = 1/fH Monostable Threshold Internal Pulse Width (t5 = C5 x V5 /I5) Output Pulse Duration (low) - T = 1/fH Output Saturation Voltage Permissible delay between output pulse leading edge and flyback pulse leading edge 1 (for keeping a constant duty cycle) ; T = fH Flyback Input Current at Pin 8 Clamp voltage at Pin 8 Current for switching low the output pulse Peak control current Sync high Sync low q Input high q Input low @ fH = 27.64kHz q q Parameter Test conditions Min. 10.5 Typ. 12 40 3.5 4 3.04 2.5 3 17 Max. 15.5 70 3.8 4.3 3.2 Unit V mA V mA VPP V mA µA degree V V µA µA µs V µs µs µs V s I1 = 0.5mA fo = 1/(K0 x R1 x C2) (See technical note 1) 3.2 -1 3.7 2.8 1.6 2 8 0.8 10 0.9T 6.4 - 10 1 5.6 C5 = 220 pF (see technical note 2) fH = 27kHz fH = 70kHz I7 = 600 mA See technical note 4 @ fH = 27kHz 6 3.6 0.38T 0.41T 0.44T 0.35T 0.39T 0.43T 1.2 2.5 0.41 T - t FLY IFLY V8 I8 I9 0.7 0.9 3/7 9102T-03.TBL Flyback On Flyback Off q I8 = 1mA q I8 = - 1mA q q 0.7 -1 0.6 2 - 0.6 2 mA mA V V mA mA 9102T-02.TBL TDA9102C/T ELECTRICAL CHARACTERISTICS (continued) (Tamb = 25oC, VS = 12V, refer to the test circuits, unless otherwise specified) Symbol HORIZONTAL SECTION K9 V10 K10 HADJ Phase sensitivity at Pin 9 Control voltage range Phase control sensitivity at Pin 10 Horizontal phase adjustment for V10 varying from 0.5 to 4.5V (27.64kHz) Phase jitter constant (jitter = K1 6 Parameter Test conditions Min. Typ. Max. Unit degree V V degree V degree (See technical note 3) 0.5 20 Zero degree phase: flyback centered on the middle of the pulse at Pin 5 - 45 67.5 4.5 22.5 25 + 45 K1 K2 10 . fH Frequency drift versus supply voltage dF . 106 K2 = dV . fH Voltage reference at Pi.


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