TDA9144

INTEGRATED CIRCUITS DATA SHEET TDA9144 I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor with PALplus helper demodulator Preliminary specification File under Integrated Circuits, IC02 1996 Jan 17 Philips Semiconductors Preliminary specification I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor with PALplus helper demodulator FEATURES Multi-standard colour decoder and sync processor for PAL, NTSC and SECAM PALplus helper demodulator PALplus helper blanking and EDTV-2 blanking I2C-bus controlled I2C-bus addresses hardware selectable Pin compatible with TDA9141 Alignment free Few external components Designed for use with baseband delay lines Integrated video filters Adjustable luminance delay Noise detector with I2C-bus read-out Norm/no_norm detector with I2C-bus read-out CVBS or Y/C input, with automatic detection possibility CVBS output provided I2C-bus address 8A is used Vertical divider system Two-level sandcastle signal VA synchronization pulse (3-state) HA synchronization pulse or clamping pulse CLP input/output Line-locked clock output (6.75 MHz or 6.875 MHz) or stand-alone I2C-bus output port Stand-alone I2C-bus input/output port Colour matrix and fast YUV switch Comb filter enable input/output with subcarrier frequency Internal bypass mode of external delay line for PALplus and NTSC applications Low power standby mode with 3-state YUV outputs Fast blanking detector with ...