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TEA1124 Dataheets PDF



Part Number TEA1124
Manufacturers TEMIC Semiconductors
Logo TEMIC Semiconductors
Description Zero Voltage Switch
Datasheet TEA1124 DatasheetTEA1124 Datasheet (PDF)

TEA1024/ TEA1124 Zero Voltage Switch with Fixed Ramp Description The monolithic integrated bipolar circuit, TEA1024/ TEA1124 is a zero voltage switch for triac control in domestic equipments. It offers not only the control of a triac in zero crossing mode but also the possibility of power control. This is why the IC contains a mains synchronized ramp generator with 640 ms (1280 ms) duration (50 Hz). It is suitable for a typical load of 750 W (1000 W) meeting the Flicker Standard. (values in brac.

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TEA1024/ TEA1124 Zero Voltage Switch with Fixed Ramp Description The monolithic integrated bipolar circuit, TEA1024/ TEA1124 is a zero voltage switch for triac control in domestic equipments. It offers not only the control of a triac in zero crossing mode but also the possibility of power control. This is why the IC contains a mains synchronized ramp generator with 640 ms (1280 ms) duration (50 Hz). It is suitable for a typical load of 750 W (1000 W) meeting the Flicker Standard. (values in brackets relate to TEA1124.) Features D D D D D D Direct supply from the mains Definite IC switching characteristics Very few external components Full wave drive – no dc component in the load circuit Current consumption ≤ 1.5 mA Output short circuit protected Package: DIP8 D D D D Simple power control Integrated ramp generator Reference voltage variable by external resistance Pulse position optimization Block Diagram 95 10871 D1 390 kW R2 (Rsync) R1 1N4007 22 kW/ 2W Load 1000 W L 7 1 56 kW Ramp generator TEA 1024 – 640 ms TEA 1124 – 1280 ms 4 6 C1 100 mF 16 V TIC 236N V M= 230 V ~ Sync. logic Supply MT2 MT1 Comparator Protection min. 100 kW max. 2 43 kW NC + – 3 NC 8 Pulse amplifier 5 RG 68 W N Figure 1. Typical block diagram – open loop power control TELEFUNKEN Semiconductors Rev. A1, 24-May-96 1 (8) TEA1024/ TEA1124 Power Supply and its Limitations The voltage limitation contained in the IC allows it to be powered from mains via series resistance R1 and recti– fying diode D1 between Pin 6 (+ Pol/ ) and Pin 4 (–VS). The capacitor C1 smooths the supply voltage (see figure 1). Full-Wave Logic The full-wave logic ensures that only pairs of pulses can be released, and that these always begin with the positive dv/dt. The load is thus switched on for a minimum of one complete mains cycle. This means that the triac receives a minimum of two driving pulses, so that the unwanted d.c. component in the load circuit is definitely eliminated. ă An internal temperature-compensated limiting circuit protects the module from random peaks of voltage on the mains, and delivers a defined reference voltage during the negative half-cycle. Pulse Amplifier The pulse amplifier connected to the output of the fullwave logic circuit, is proof against continuos short-circuits, and delivers negative output pulses of typ. 75 mA, via an integrated limiting resistance, to Pin 5. Synchronization Ramp Generator (Figures 3, 4) Ramp voltage which is generated in the IC is available not only at reference Pin 1, but also at the non-inverted input of the comparator. The current sink which is controlled by D/A converter influences the internal reference voltage at Pin 1 specified by voltage divider. The current sink is turned-off in the reset state of the D/A converter so that the voltage at Pin 1 is primarily specified via the internal voltage divider (ramp starting voltage). In the maximum state of the 4 stage (5 stage – TEA1124) D/A converter, the current sink overtak.


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