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TEA1205AT Dataheets PDF



Part Number TEA1205AT
Manufacturers NXP
Logo NXP
Description High efficiency DC/DC converter
Datasheet TEA1205AT DatasheetTEA1205AT Datasheet (PDF)

INTEGRATED CIRCUITS DATA SHEET TEA1205AT High efficiency DC/DC converter Preliminary specification File under Integrated Circuits, IC03 1998 Mar 24 Philips Semiconductors Preliminary specification High efficiency DC/DC converter FEATURES • Fully integrated DC/DC converter circuit • Up conversion in 2 different modes • High efficiency over wide load range • Synchronizes to external high frequency clock • Output power up to 3.6 W (typ.) continuous, 8 W in GSM burst mode • Low quiescent power con.

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INTEGRATED CIRCUITS DATA SHEET TEA1205AT High efficiency DC/DC converter Preliminary specification File under Integrated Circuits, IC03 1998 Mar 24 Philips Semiconductors Preliminary specification High efficiency DC/DC converter FEATURES • Fully integrated DC/DC converter circuit • Up conversion in 2 different modes • High efficiency over wide load range • Synchronizes to external high frequency clock • Output power up to 3.6 W (typ.) continuous, 8 W in GSM burst mode • Low quiescent power consumption • True current limit for Li-ion battery compatibility • Shut-down function • 8-pin SO package. APPLICATIONS • Cellular and cordless phones PDAs and others • Supply voltage source for low-voltage chip sets • Portable computers • Battery backup supplies • Cameras. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TEA1205AT SO8 DESCRIPTION plastic small outline package; 8 leads; body width 3.9 mm GENERAL DESCRIPTION TEA1205AT The TEA1205AT (see Fig.1) is a fully integrated DC/DC converter circuit using the minimum amount of external components. It is intended to be used to supply electronic circuits with supply voltages of 3.3 or 5.5 V from 2, 3 or 4 NiCd cell batteries or one Li-ion battery at an output power level up to 3.6 W (typ.) continuously, or 8 W in GSM TDMA (1 : 8) burst mode. The switching frequency of the converter can be synchronized to an external high-frequency clock. Efficient, compact and dynamic power conversion is achieved using a novel, digitally controlled Pulse Width and Frequency Modulation (PWFM) like control concept, integrated low RdsON CMOS power switches with low parasitic capacitances and synchronous rectification. VERSION SOT96-1 1998 Mar 24 2 Philips Semiconductors Preliminary specification High efficiency DC/DC converter QUICK REFERENCE DATA SYMBOL Supplies VO Vstart η output voltage start-up voltage VSEL = LOW VSEL = HIGH Efficiency; see Figs 6 and 7 efficiency up from 2.4 to 3.3 V up from 3.6 to 5.5 V Current levels Iq ISHDWN IlimN Ilx RdsON(N) RdsON(P) Timing fsw tres fsync Note switching frequency response time from standby to Pmax synchronisation input frequency 150 − − 200 25 13 quiescent current at pin 3 shut-down current NFET current limit max. continuous current at pin 5 note 1 50 − 0.9 Ilim − 60 2 Ilim − 1 mA < IL < 1.0 A 1 mA < IL < 1.0 A 80 83 90 90 5.23 3.13 1.6 5.55 3.34 2.0 PARAMETER CONDITIONS MIN. TYP. TEA1205AT MAX. UNIT 5.85 3.54 2.2 V V V 95 94 % % µA µA A A Ω Ω 70 10 1.1 Ilim 1.0 Power MOSFETS pin-to-pin resistance NFET pin-to-pin resistance PFET 0.08 0.10 0.12 0.16 0.20 0.25 240 − − kHz µs MHz 1. The NFET current limit is set by an external 1% accurate resistor Rlim connected between pin 7 and pin 6 (ground). The typical maximum instantaneous current is defined as: Ilim = 890 V/ Rlim so the use of Rlim = 315 Ω will lead to a typical maximum current value of 2.83 A. The average inductor current during current limit also depends on inductance value and resistive losses in all components .


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