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P80CE560 Dataheets PDF



Part Number P80CE560
Manufacturers NXP
Logo NXP
Description 8-bit microcontroller
Datasheet P80CE560 DatasheetP80CE560 Datasheet (PDF)

INTEGRATED CIRCUITS DATA SHEET P8xCE560 8-bit microcontroller Product specification File under Integrated Circuits, IC20 1997 Aug 01 Philips Semiconductors Product specification 8-bit microcontroller CONTENTS 1 2 2.1 2.2 3 4 5 6 6.1 6.2 7 8 8.1 8.2 8.3 9 10 10.1 10.2 10.3 11 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 12 12.1 12.2 12.3 13 13.1 13.2 14 14.1 14.2 14.3 14.4 14.5 FEATURES GENERAL DESCRIPTION Electromagnetic Compatibility (EMC) Recommendation on ALE ORDERING INFORMATION BLOCK DIAGRAM .

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INTEGRATED CIRCUITS DATA SHEET P8xCE560 8-bit microcontroller Product specification File under Integrated Circuits, IC20 1997 Aug 01 Philips Semiconductors Product specification 8-bit microcontroller CONTENTS 1 2 2.1 2.2 3 4 5 6 6.1 6.2 7 8 8.1 8.2 8.3 9 10 10.1 10.2 10.3 11 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 12 12.1 12.2 12.3 13 13.1 13.2 14 14.1 14.2 14.3 14.4 14.5 FEATURES GENERAL DESCRIPTION Electromagnetic Compatibility (EMC) Recommendation on ALE ORDERING INFORMATION BLOCK DIAGRAM FUNCTIONAL DIAGRAM PINNING INFORMATION Pinning diagram Pin description FUNCTIONAL DESCRIPTION MEMORY ORGANIZATION Program Memory Internal Data Memory Addressing I/O FACILITIES PULSE WIDTH MODULATED OUTPUTS (PWM) Prescaler Frequency Control Register (PWMP) Pulse Width Register 0 (PWM0) Pulse Width Register 1 (PWM1) ANALOG-TO-DIGITAL CONVERTER (ADC) ADC features ADC functional description ADC timing ADC configuration and operation ADC during Idle and Power-down mode ADC resolution and characteristics ADC after reset ADC Special Function Registers TIMERS/COUNTERS Timer 0 and Timer 1 Timer T2 Watchdog Timer T3 SERIAL I/O PORTS Serial I/O Port: SIO0 (UART) Serial I/O Port: SIO1 (I2C-bus interface) INTERRUPT SYSTEM Interrupt Enable Registers Interrupt Handling Interrupt Priority Structure Interrupt vectors Interrupt Enable and Priority Registers 24 25 25.1 25.2 25.3 25.4 26 27 28 15 15.1 15.2 15.3 15.4 15.5 16 16.1 16.2 17 17.1 18 18.1 18.2 18.3 19 20 21 22 22.1 22.2 23 P8xCE560 POWER REDUCTION MODES Idle mode Power-down mode Wake-up from Power-down mode Status of external pins Power Control Register (PCON) OSCILLATOR CIRCUITS XTAL1; XTAL2 oscillator: standard 80C51 XTAL3; XTAL4 oscillator: 32 kHz PLL oscillator (with Seconds timer) RESET CIRCUITRY Power-on Reset INSTRUCTION SET Addressing modes 80C51 family instruction set Instruction set description LIMITING VALUES DC CHARACTERISTICS AC CHARACTERISTICS EPROM CHARACTERISTICS Programming and verification Security SPECIAL FUNCTION REGISTERS OVERVIEW PACKAGE OUTLINES SOLDERING Introduction Reflow soldering Wave soldering Repairing soldered joints DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS 1997 Aug 01 2 Philips Semiconductors Product specification 8-bit microcontroller 1 FEATURES P8xCE560 The P8xCE560 contains a volatile 2048 bytes read/write Data Memory, five 8-bit I/O ports, one 8-bit input port, two 16-bit timer/event counters (identical to the timers of the 80C51), an additional 16-bit timer coupled to capture and compare latches, a 15-source, two-priority-level, nested interrupt structure, an 8-input ADC, a dual Digital-to-Analog Convertor (DAC), Pulse Width Modulated interface, two serial interfaces (UART and I2C-bus), a Watchdog Timer, an on-chip oscillator and timing circuits. The P8xCE560 is available in 3 versions: • P80CE560: ROMless version • P83CE560: containing a non-volatile 64 kbytes mask programmable ROM • P87CE560: containing 64 kbytes programmable EPROM/OTP. The P8xCE560 is a control-oriented CPU with on-chip Program and Data Memory; it cannot be extended with external Program Memory. It can access up to 64 kbytes of external Data Memory. For systems requiring extra capability, the P8xCE560 can be expanded using standard TTL compatible memories and peripherals. In addition, the P8xCE560 has two software selectable reduced power modes: Idle mode and Power-down mode. The Idle mode freezes the CPU while allowing the RAM, timers, serial ports, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative.The Power-down mode can be terminated by an external reset, by the seconds interrupt and by any one of the two external interrupts; see Section 15.3. The device also functions as an arithmetic processor having facilities for both binary and BCD arithmetic as well as bit-handling capabilities. The instruction set of the P8xCE560 is the same as the 80C51 and consists of over 100 instructions: 49 one-byte, 45 two-byte, and 17 three-byte. With a 16 MHz system clock, 58% of the instructions are executed in 0.75 µs and 40% in 1.5 µs. Multiply and divide instructions require 3 µs. • 80C51 Central Processing Unit (CPU) • 64 kbytes ROM (only P83CE560) • 64 kbytes EPROM (only P87CE560) • ROM/EPROM Code protection • 2048 bytes RAM, expandable externally to 64 kbytes • Two standard 16-bit timers/counters • An additional 16-bit timer/counter coupled to four capture registers and three compare registers • A 10-bit Analog-to-Digital Converter (ADC) with eight multiplexed analog inputs and programmable autoscan • Two 8-bit resolution, Pulse Width Modulation outputs • Five 8-bit I/O ports plus one 8-bit input port shared with analog inputs • I2C-bus serial I/O port with byte oriented master and slave functions • Full-duplex UART compatible with the standard 80C51 • On-chip Watchdog Timer • 15 interrupt sources with 2 priority levels (2 t.


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