sync proc.. P83C280 Datasheet

P83C280 proc.. Datasheet pdf. Equivalent

Part P83C280
Description Microcontrollers for monitors with DDC interface/ auto-sync detection and sync proc.
Feature INTEGRATED CIRCUITS DATA SHEET P83Cx80; P87C380 Microcontrollers for monitors with DDC interface, .
Manufacture NXP
Datasheet
Download P83C280 Datasheet



P83C280
INTEGRATED CIRCUITS
DATA SHEET
P83Cx80; P87C380
Microcontrollers for monitors
with DDC interface, auto-sync
detection and sync proc.
Product speciļ¬cation
File under Integrated Circuits, IC20
1997 Dec 12



P83C280
Philips Semiconductors
Microcontrollers for monitors with DDC
interface, auto-sync detection and sync proc.
Product speciļ¬cation
P83Cx80; P87C380
CONTENTS
1
1.1
1.2
2
3
4
5
5.1
5.2
6
6.1
7
7.1
7.2
7.3
8
8.1
8.2
8.3
8.4
9
10
10.1
10.2
11
11.1
11.2
11.3
11.4
12
13
13.1
13.2
13.3
14
14.1
14.2
14.3
15
15.1
FEATURES
Differences from the 80C51 core
Memory
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING INFORMATION
Pinning
Pin description
FUNCTIONAL DESCRIPTION
General
MEMORY ORGANIZATION
Program memory
Internal data memory
Additional Special Function Registers
INTERRUPTS
Priority level structure
How interrupts are handled
Interrupt Enable Register (IE)
Interrupt Priority Register (IP)
WATCHDOG TIMER
INPUT/OUTPUT (I/O)
The alternative functions for Port 0, Port 1,
Port 2 and Port 3
EMI (Electromagnetic Interference) reduction
REDUCED POWER MODES
Power Control Register
Idle mode
Power-down mode
Status of external pins
OSCILLATOR
RESET
External reset
Power-on-reset
T2 (Watchdog Timer) overflow
ANALOG CONTROL (DC)
8-bit PWM outputs (PWM0 to PWM9)
14-bit PWM output (PWM10)
A typical PWM output application
ANALOG-TO-DIGITAL CONVERTER (ADC)
Conversion algorithm
16
16.1
17
17.1
17.2
17.3
17.4
17.5
17.6
18
19
19.1
19.2
19.3
20
21
22
23
24
25
26
27
28
29
29.1
29.2
29.3
30
31
32
DIGITAL-TO-ANALOG CONVERTER (DAC)
8-bit Data Registers for the DAC outputs
(DACn; n = 0 to 3)
DISPLAY DATA CHANNEL (DDC)
INTERFACE
Special Function Registers related to the DDC
interface
Host type detection
DDC1 protocol
DDC2B protocol
DDC2AB/DDC2B+ protocol
RAM buffer for the system and DDC application
I2C-BUS INTERFACE
HARDWARE MODE DETECTION
Special Function Register for mode detection
and sync separation
System description
System operation
POWER MANAGEMENT
CONTROL MODES
ONE TIME PROGRAMMABLE (OTP)
VERSION
LIMITING VALUES
HANDLING
DC CHARACTERISTICS
DIGITAL-TO-ANALOG CONVERTER
CHARACTERISTICS
AC CHARACTERISTICS
PACKAGE OUTLINE
SOLDERING
Introduction
Soldering by dipping or by wave
Repairing soldered joints
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I2C COMPONENTS
1997 Dec 12
2





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