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P83C566 Datasheet
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Part P83C566
Description Microcontrollers for PAL/SECAM TV with OSD and VST
Feature P83C566; INTEGRATED CIRCUITS DATA SHEET P8xCx66 family Microcontrollers for PAL/SECAM TV with OSD and VST P.
Manufacture NXP
Datasheet
Download P83C566 Datasheet




NXP P83C566
INTEGRATED CIRCUITS
DATA SHEET
P8xCx66 family
Microcontrollers for PAL/SECAM
TV with OSD and VST
Product specification
File under Integrated Circuits, IC20
1999 Mar 10



NXP P83C566
Philips Semiconductors
Microcontrollers for PAL/SECAM TV
with OSD and VST
CONTENTS
1 FEATURES
2 GENERAL DESCRIPTION
3 ORDERING INFORMATION
4 BLOCK DIAGRAM
5 PINNING INFORMATION
6 MEMORY ORGANIZATION
7 I/O FACILITY
8 TIMERS AND EVENT COUNTERS
9 REDUCED POWER MODE
10 I2C-BUS SERIAL I/O
11 INTERRUPT SYSTEM
12 OSCILLATOR CIRCUITRY
13 RESET CIRCUITRY
14 PIN FUNCTION SELECTION
15 ANALOG CONTROL
16 ANALOG-TO-DIGITAL CONVERTERS (ADC)
17 ON-SCREEN DISPLAY (OSD)
18 EPROM PROGRAMMER
19 SPECIAL FUNCTION REGISTERS
ADDRESS MAP
20 LIMITING VALUES
21 CHARACTERISTICS
22 PINNING CHARACTERIZATION
23 PACKAGE OUTLINES
24 SOLDERING
25 DEFINITIONS
26 LIFE SUPPORT APPLICATIONS
27 PURCHASE OF PHILIPS I2C COMPONENTS
Product specification
P8xCx66 family
1999 Mar 10
2



NXP P83C566
Philips Semiconductors
Microcontrollers for PAL/SECAM TV
with OSD and VST
Product specification
P8xCx66 family
1 FEATURES
1.1 P80C51 CPU core
80C51 8-bit CPU
64-kbyte Multiple Programming ROM (MTP ROM)
Two 16-bit timer/event counters
Crystal oscillator for system clock (up to 12 MHz)
12 source, 12 vector interrupt structure with two priority
levels
Enhanced architecture with:
– Non-page orientated instructions
– Direct addressing
– Four 8-byte RAM register banks
– Stack depth up to 128 bytes
– Multiply, divide, subtract and compare instructions.
1.2 P8xCx66 family
ROM/RAM: see Table 1
Pulse Width Modulated (PWM) outputs:
– One 14-bit PWM output for Voltage Synthesized
Tuning (VST)
– Eight 7-bit PWM outputs for analog controls.
3 Analog-to-Digital (ADC) inputs with 4-bit DAC and
comparator
LED driver port:
– All I/O port lines with 10 mA LED drive capability
(VO <1.0 V)
– Up to 5 LEDs can be driven at any one time.
Serial I/O:
– Multi-master I2C-bus interface
– Maximum I2C-bus frequency 400 kHz.
Watchdog timer
Improved EMC measures and slope controlled I/Os
OSD functions:
– Programmable VSYNC and HSYNC active levels
– Display RAM: 192 × 12 bits
– Display character fonts: 128 (126 customer fonts plus
2 reserved codes)
– 63 vertical starting positions controlled by software
– 110 horizontal starting positions controlled by
software
– Character size: 4 different character sizes on a
line-by-line basis
– Character matrix: 12 × 18 with no spacing between
characters
– Foreground colours: 8 on a character-by-character
basis
– Background/shadowing modes: two primary modes -
TV mode and Frame mode on a frame basis. Each
primary mode has four sub-modes on a line basis:
Sub-mode 1: Superimpose (no background)
Sub-mode 2: North-West shadowing
Sub-mode 3: Box background
Sub-mode 4: Border shadowing
– Background colours: 8 on a word-by-word basis,
available in all four sub-modes
– Display RAM starting address is programmable; fast
switching between banks of display (RAM)
characters is possible through software control
– HSYNC driven PLL for OSD clock (4 to 12 MHz)
– Character blinking ratio: 1 : 1
– Character blinking frequency: programmable using
fVSYNC divisors of 32 and 64, on a character basis
– Flexible display format using the Carriage Return
code and the Space codes
– Display RAM address post incremented each time
new data is written into RAM
– Vertical jitter cancelling circuit to avoid unstable
VSYNC leading edge mismatch with HSYNC signal
– OSD meshing.
Power-on reset
Packages: SDIL42 (PLCC68 for piggy-back only)
Operating voltage: 4.5 to 5.5 V
Operating temperature: 20 to +70 °C
System clock frequency: 4 to 12 MHz
OSD clock frequency: 4 to 12 MHz.
1999 Mar 10
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