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SN54LS107A Datasheet, Equivalent, EDGE-TRIGGERED FLIP-FLOP.DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| Part | SN54LS107A |
|---|---|
| Description | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| Feature | SN54/74LS107A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output changes are initiated by the HIGH-to-LOW transition of the clock. A LOW signal on CD input overrides the other inputs and makes the Q output LOW. The SN54 / 74LS107A is the same as the SN54 / 74LS73A but has corner power pins. DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY CONNECTION DIAGRAM DIP (TOP VIEW) VCC 14 CD1 13 CP1 12 K2 11 CD2 10 CP2 9 J2 8 NOTE: The Flatpak version has the same pinouts (Connection Diagram. |
| Manufacture | Motorola Inc |
| Datasheet |
| Part | SN54LS107A |
|---|---|
| Description | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| Feature | SN54/74LS107A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output changes are initiated by the HIGH-to-LOW transition of the clock. A LOW signal on CD input overrides the other inputs and makes the Q output LOW. The SN54 / 74LS107A is the same as the SN54 / 74LS73A but has corner power pins. DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY CONNECTION DIAGRAM DIP (TOP VIEW) VCC 14 CD1 13 CP1 12 K2 11 CD2 10 CP2 9 J2 8 NOTE: The Flatpak version has the same pinouts (Connection Diagram. |
| Manufacture | Motorola Inc |
| Datasheet |
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