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SN54LS112A Datasheet, Equivalent, EDGE-TRIGGERED FLIP-FLOP.

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

 

 

 

Part SN54LS112A
Description DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
Feature SN54/74LS112A DUAL JK NEGATIVE EDGE-TRIG GERED FLIP-FLOP The SN54 / 74LS112A dua l JK flip-flop features individual J, K , clock, and asynchronous set and clear inputs to each flip-flop.
When the clo ck goes HIGH, the inputs are enabled an d data will be accepted.
The logic leve l of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum set-up and hold time are observed.
Inpu t data is transferred to the outputs on the negative-going edge of the clock p ulse.
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW .
Manufacture Motorola Inc
Datasheet
Download SN54LS112A Datasheet
Part SN54LS112A
Description DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
Feature SN54/74LS112A DUAL JK NEGATIVE EDGE-TRIG GERED FLIP-FLOP The SN54 / 74LS112A dua l JK flip-flop features individual J, K , clock, and asynchronous set and clear inputs to each flip-flop.
When the clo ck goes HIGH, the inputs are enabled an d data will be accepted.
The logic leve l of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum set-up and hold time are observed.
Inpu t data is transferred to the outputs on the negative-going edge of the clock p ulse.
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW .
Manufacture Motorola Inc
Datasheet
Download SN54LS112A Datasheet

SN54LS112A

SN54LS112A
SN54LS112A

SN54LS112A

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