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SN54LS569A Datasheet > UP/DOWN COUNTER

SN54LS569A | Motorola Inc

FOUR-BIT UP/DOWN COUNTER, SN54/74LS569A FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS The SN.
FOUR-BIT UP/DOWN COUNTER, SN54/74LS569A FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS The SN54 / 74LS569A is designed as programmable up/down BCD and Binary counters respectively. These devices have 3-state outputs for use in bus organized systems. With the exception of output enable (OE) and asynchronous clear (ACLR), all functions occur on the positive edge of the clock pulse (CP). When the LOAD input is LOW, the out.





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SN54LS569A | Motorola Inc
FOUR-BIT UP/DOWN COUNTER
Download SN54LS569A Datasheet
SN54/74LS569A FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS The SN54 / 74LS569A is designed as p.
SN54/74LS569A FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS The SN54 / 74LS569A is designed as programmable up/down BCD and Binary counters respectively. These devices have 3-state outputs for use in bus organized systems. With the exception of output enable (OE) and asynchronous clear (ACLR), all functions occur on the positive edge of the clock pulse (CP). When the LOAD input is LOW, the outputs will be programmed by the parallel data input.



SN54LS569A


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