DatasheetsPDF.com

SN54LS569A Datasheet, Equivalent, UP/DOWN COUNTER.

FOUR-BIT UP/DOWN COUNTER

FOUR-BIT UP/DOWN COUNTER

 

 

 

Part SN54LS569A
Description FOUR-BIT UP/DOWN COUNTER
Feature SN54/74LS569A FOUR-BIT UP/DOWN COUNTER W ITH THREE-STATE OUTPUTS The SN54 / 74LS 569A is designed as programmable up/dow n BCD and Binary counters respectively.
These devices have 3-state outputs for use in bus organized systems.
With the exception of output enable (OE) and as ynchronous clear (ACLR), all functions occur on the positive edge of the clock pulse (CP).
When the LOAD input is LOW , the outputs will be programmed by the parallel data inputs (A, B, C, D) on t he next clock edge.
Enabling of the cou nters occurs only when CEP and CET are LOW and LOAD is HIGH.
Direction of the count is contr .
Manufacture Motorola Inc
Datasheet
Download SN54LS569A Datasheet
Part SN54LS569A
Description FOUR-BIT UP/DOWN COUNTER
Feature SN54/74LS569A FOUR-BIT UP/DOWN COUNTER W ITH THREE-STATE OUTPUTS The SN54 / 74LS 569A is designed as programmable up/dow n BCD and Binary counters respectively.
These devices have 3-state outputs for use in bus organized systems.
With the exception of output enable (OE) and as ynchronous clear (ACLR), all functions occur on the positive edge of the clock pulse (CP).
When the LOAD input is LOW , the outputs will be programmed by the parallel data inputs (A, B, C, D) on t he next clock edge.
Enabling of the cou nters occurs only when CEP and CET are LOW and LOAD is HIGH.
Direction of the count is contr .
Manufacture Motorola Inc
Datasheet
Download SN54LS569A Datasheet

SN54LS569A

SN54LS569A
SN54LS569A

SN54LS569A

Recommended third-party SN54LS569A Datasheet

 

 

@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)